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ADT7467ARQZ-R7 Datasheet(PDF) 62 Page - ON Semiconductor |
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ADT7467ARQZ-R7 Datasheet(HTML) 62 Page - ON Semiconductor |
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62 / 77 page  ADT7467 Rev. 3 | Page 62 of 77 | www.onsemi.com Table 20. Fan Tachometer Reading Registers (Power-On Default = 0x00)1 Register Address R/W Description 0x28 Read only TACH1 low byte. 0x29 Read only TACH1 high byte. 0x2A Read only TACH2 low byte. 0x2B Read only TACH2 high byte. 0x2C Read only TACH3 low byte. 0x2D Read only TACH3 high byte. 0x2E Read only TACH4 low byte. 0x2F Read only TACH4 high byte. 1 These registers count the number of 11.11 μs periods (based on an internal 90 kHz clock) that occur between a number of consecutive fan TACH pulses (default = 2). The number of TACH pulses used to count can be changed using the TACH pulses per revolution register (0x7B). This allows the fan speed to be accurately measured. Because a valid fan tachometer reading requires that two bytes are read, the low byte must be read first. Both the low and high bytes are then frozen until read. At power-on, these registers contain 0x0000 until the first valid fan TACH measurement is read into these registers. This prevents false interrupts from occurring while the fans are spinning up. A count of 0xFFFF indicates that a fan is one of the following: • Stalled or blocked (object jamming the fan). • Failed (internal circuitry destroyed). • Not populated. (The ADT7467 expects to see a fan connected to each TACH. If a fan is not connected to a TACH, the minimum high and low bytes of that TACH should be set to 0xFFFF.) • Alternate function (for example, TACH4 reconfigured as THERM pin). • 2-wire instead of 3-wire fan. Table 21. Current PWM Duty Cycle Registers (Power-On Default = 0x00)1 Register Address R/W Description 0x30 Read/write PWM1 current duty cycle (0% to 100% duty cycle = 0x00 to 0xFF). 0x31 Read/write PWM2 current duty cycle (0% to 100% duty cycle = 0x00 to 0xFF). 0x32 Read/write PWM3 current duty cycle (0% to 100% duty cycle = 0x00 to 0xFF). 1 These registers reflect the PWM duty cycle driving each fan at any given time. When in automatic fan speed control mode, the ADT7467 reports the PWM duty cycles through these registers. The PWM duty cycle values vary according to the temperature in automatic fan speed control mode. During fan startup, these registers report 0x00. In software mode, the PWM duty cycle outputs can be set to any duty cycle value by writing to these registers. Table 22. Operating Point Registers (Power-On Default = 0xA4)1, 2, 3 Register Address R/W Description 0x33 Read/write Remote 1 operating point register (default = 100°C). 0x34 Read/write Local temperature operating point register (default = 100°C). 0x35 Read/write Remote 2 operating point register (default = 100°C). 1 These registers set the target operating point for each temperature channel when the dynamic TMIN control feature is enabled. 2 The fans being controlled are adjusted to maintain temperature about an operating point. 3 These registers become read-only registers when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to these registers fail. |
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