ADT7467ARQZ-R7 datasheet(51/77 Pages) ONSEMI

51 / 77 page

ADT7467

Rev. 3 | Page 51 of 77 | www.onsemi.com

STEP 10: HIGH AND LOW LIMITS FOR

TEMPERATURE CHANNELS

If the temperature falls below the temperature channel’s low

limit, TMIN increases. This reduces fan speed, allowing the

system to heat up. An interrupt can be generated when the

temperature drops below the low limit.

If the temperature increases above the temperature channel’s

high limit, TMIN decreases. This increases fan speed to cool

down the system. An interrupt can be generated when the

temperature rises above the high limit.

Programming High and Low Limits

There are six limit registers; a high limit and a low limit are

associated with each temperature channel. These 8-bit registers

allow the high and low limit temperatures to be programmed

with 1°C resolution.

Temperature Limit Registers

How Dynamic TMIN Control Works

The basic premise is as follows:

Set the target temperature for the temperature zone, for

example, the Remote 1 thermal diode. This value is

programmed to the Remote 1 operating temperature

As the temperature in that zone (Remote 1 temperature)

exceeds the operating point temperature, TMIN is reduced

and the fan speed increases.

As the temperature drops below the operating point

temperature, TMIN is increased and the fan speed is reduced.

However, the loop operation is not as simple as described in

these steps. A number of conditions govern the situations in

which TMIN can increase or decrease.

Short Cycle and Long Cycle

The ADT7467 implements two loops: a short cycle and a long

cycle. The short cycle takes place every n monitoring cycles.

The long cycle takes place every 2n monitoring cycles. The

value of n is programmable for each temperature channel. The

bits are located at the following register locations:

Remote 1 = CYR1 = Bits <2:0> of Dynamic TMIN Control

Local = CYL = Bits <5:3> of Dynamic TMIN Control Register 2

(Address 0x37)

Remote 2 = CYR2 = Bits <7:6> of Dynamic TMIN Control

Table 16. Cycle Bit Assignments

Code

Short Cycle

Long Cycle

000

8 cycles

(1 sec)

16 cycles

(2 sec)

001

16 cycles

(2 sec)

32 cycles

(4 sec)

010

32 cycles

(4 sec)

64 cycles

(8 sec)

011

64 cycles

(8 sec)

128 cycles

(16 sec)

100

128 cycles

(16 sec)

256 cycles

(32 sec)

101

256 cycles

(32 sec)

512 cycles

(64 sec)

110

512 cycles

(64 sec)

1024 cycles

(128 sec)

111

1024 cycles

(128 sec)

2048 cycles

(256 sec)

Care should be taken when choosing the cycle time. A long cycle

time means that TMIN is updated less often. If a system has very

fast temperature transients, the dynamic TMIN control loop lags.

If a cycle time is chosen that is too fast, the full benefit of chang-

ing TMIN might not be realized and will need to change upon the

next cycle; in effect, it is overshooting. Some calibration is

necessary to identify the most suitable response time.

Figure 70 shows the steps taken during the short cycle.

IS T1(n) – T1(n – 1) = 0.5 – 0.75°C

IS T1(n) – T1(n – 1) = 1.0 – 1.75°C

IS T1(n) – T1(n – 1) > 2.0°C

IS T1(n) >

(OP1 – HYS)

YES

IS T1(n) – T1(n – 1)

≤

0.25°C

DO NOTHING

(SYSTEM IS

COOLING OFF

FOR CONSTANT)

YES

DO NOTHING

WAIT n

MONITORING

CYCLES

TEMPERATURE

MEASUREMENT

T1 (n – 1)

CURRENT

TEMPERATURE

MEASUREMENT

T1(n)

OPERATING

POINT

TEMPERATURE

OP1

DECREASE TMIN BY 1°C

DECREASE TMIN BY 2°C

DECREASE TMIN BY 4°C

Figure 70. Short Cycle Steps

ADT7467ARQZ-R7 Datasheet(PDF) 51 Page - ON Semiconductor

ADT7467ARQZ-R7 Datasheet(HTML) 51 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77

Datasheet Download

Link URL