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ADT7467ARQZ-R7 Datasheet(PDF) 71 Page - ON Semiconductor |
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ADT7467ARQZ-R7 Datasheet(HTML) 71 Page - ON Semiconductor |
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71 / 77 page  ADT7467 Rev. 3 | Page 71 of 77 | www.onsemi.com Table 41. TMIN Registers1 Register Address R/W2 Description Power-On Default 0x67 Read/write Remote 1 TMIN. 0x9A (90°C) 0x68 Read/write Local TMIN. 0x9A (90°C) 0x69 Read/write Remote 2 TMIN. 0x9A (90°C) 1 These are the TMIN registers for each temperature channel. When the temperature measured exceeds TMIN, the appropriate fan runs at minimum speed and increases with temperature according to TRANGE. 2 These registers become read-only registers when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to these registers fail. Table 42. THERM Temperature Limit Registers1 Register Address R/W2 Description Power-On Default 0x6A Read/write Remote 1 THERM temperature limit. 0xA4 (100°C) 0x6B Read/write Local THERM temperature limit. 0xA4 (100°C) 0x6C Read/write Remote 2 THERM temperature limit. 0xA4 (100°C) 1 If any temperature measured exceeds its THERM limit, all PWM outputs drive their fans at 100% duty cycle. This is a fail-safe mechanism incorporated to cool the system in the event of a critical overtemperature. It also ensures some level of cooling in the event that software or hardware locks up. If set to 0x80, this feature is disabled. The PWM output remains at 100% until the temperature drops below THERM limit – hysteresis. If the THERM pin is programmed as an output, exceeding these limits by 0.25°C can cause the THERM pin to assert low as an output. 2 These registers become read-only registers when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to these registers fail. Table 43. Temperature/TMIN Hysteresis Registers1 Register Address R/W2 Description Power-On Default 0x6D Read/write Remote 1 and local temperature hysteresis. 0x44 0x6E Read/write Remote 2 temperature hysteresis. 0x40 1 Each 4-bit value controls the amount of temperature hysteresis applied to a particular temperature channel. Once the temperature for that channel falls below its TMIN value, the fan remains running at PWMMIN duty cycle until the temperature = TMIN – hysteresis. Up to 15°C of hysteresis can be assigned to any temperature channel. The hysteresis value chosen also applies to that temperature channel if its THERM limit is exceeded. If the THERM limit is exceeded, the PWM output being controlled goes to 100% and remains at 100% until the temperature drops below THERM – hysteresis. For acoustic reasons, it is recommended that the hysteresis value not be programmed to less than 4°C. Setting the hysteresis value lower than 4°C causes the fan to switch on and off regularly when the temperature is close to TMIN. 2 These registers become read-only registers when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to these registers fail. Table 44. Register 0x6D—Remote 1 and Local Temperature Hysteresis Bit Name R/W1 Description <3:0> HYSL Read/write Local temperature hysteresis. 0°C to 15°C of hysteresis can be applied to the local temperature AFC and dynamic TMIN control loops. <7:4> HYSR1 Read/write Remote 1 temperature hysteresis. 0°C to 15°C of hysteresis can be applied to the Remote 1 temperature AFC and dynamic TMIN control loops. 1 This register becomes a read-only register when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this register fail. Table 45. Register 0x6E—Remote 2 Temperature Hysteresis Bit Name R/W1 Description <7:4> HYSR2 Read/write Local temperature hysteresis. 0°C to 15°C of hysteresis can be applied to the local temperature AFC and dynamic TMIN control loops. 1 This register becomes a read-only register when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this register fail. Table 46. Register 0x6F—XNOR Tree Test Enable (Power-On Default = 0x00) Bit Name R/W1 Description <0> XEN Read/write If the XEN bit is set to 1, the device enters the XNOR tree test mode. Clearing the bit removes the device from the XNOR tree test mode. <7:1> Reserved Read only Unused. Do not write to these bits. 1 This register becomes a read-only register when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this register fail. |
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