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ADT7467ARQZ-R7 Datasheet(PDF) 24 Page - ON Semiconductor |
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ADT7467ARQZ-R7 Datasheet(HTML) 24 Page - ON Semiconductor |
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24 / 77 page ![]() ADT7467 Rev. 3 | Page 24 of 77 | www.onsemi.com THERM TMIN THERM ASSERTED TO LOW AS AN INPUT: FANS DO NOT GO TO 100% BECAUSE TEMPERATURE IS BELOW TMIN THERM ASSERTED TO LOW AS AN INPUT: FANS DO NOT GO TO 100% BECAUSE TEMPERATURE IS ABOVE TMIN AND FANS ARE ALREADY RUNNING Figure 30. Asserting THERM Low as an Input in Automatic Fan Speed Control Mode THERM Timer The ADT7467 has an internal timer to measure THERM assertion time. For example, the THERM input can be connected to the PROCHOT output of a Pentium 4 CPU to measure system performance. The THERM input can also be connected to the output of a trip point temperature sensor. The timer is started on the assertion of the THERM input and stopped when THERM is deasserted. The timer counts THERM times cumulatively, that is, the timer resumes counting on the next THERM assertion. The THERM timer continues to accumulate THERM assertion times until the timer is read (it is cleared upon a read) or until it reaches full scale. If the counter reaches full scale, it stops at that reading until cleared. The 8-bit THERM timer register (0x79) is designed such that Bit 0 is set to 1 upon the first THERM assertion. Once the cumulative THERM assertion time exceeds 45.52 ms, Bit 1 of the THERM timer is set and Bit 0 becomes the LSB of the timer with a resolution of 22.76 ms (see Figure 31). It is important to be aware of the following when using the THERM timer. After a THERM timer is read (Register 0x79), the following occurs: • The contents of the timer are cleared upon a read. • The F4P bit (Bit 5) of Interrupt Status Register 2 must be cleared, assuming that the THERM timer limit has been exceeded. If the THERM timer is read during a THERM assertion, the following occurs: • The contents of the timer are cleared. • Bit 0 of the THERM timer is set to 1 because a THERM assertion is occurring. • The THERM timer increments from 0. • If the THERM timer limit (Register 0x7A) is 0x00, the F4P bit is set. THERM THERM TIMER (REG. 0x79) THERM ASSERTED ≤ 22.76ms 7 6 5 321 0 4 0 0 0 000 1 0 THERM TIMER (REG. 0x79) THERM ASSERTED ≥ 45.52ms 7 6 5 321 0 4 0 0 0 001 0 0 THERM TIMER (REG. 0x79) THERM ASSERTED ≥ 113.8ms (91.04ms + 22.76ms) 7 6 5 321 0 4 0 0 0 010 1 0 THERM ACCUMULATE THERM LOW ASSERTION TIMES THERM ACCUMULATE THERM LOW ASSERTION TIMES Figure 31.Understanding the THERM Timer |
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