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Table 72. Register 0x7C — Configuration Register 5 (Power−On Default = 0x01)

Bit No.

Mnemonic

R/W (Note 1)

Description

[0]

TWOS

COMPL

R/W

TWOS COMPL = 1 sets the temperature range to the twos complement temperature range.

TWOS COMPL = 0 changes the temperature range to the Offset 64 temperature range.

When this bit is changed, the ADT7490 interprets all relevant temperature register values as

defined by this bit.

[1]

Temp Offset

R/W

Temp Offset = 0 sets offset range to −63°C to +64°C with 0.5°C resolution.

Temp Offset = 1 sets offset range to −63°C to +127°C with 1°C resolution.

These settings apply to Register 0x70, Register 0x71, and Register 0x72 (Remote 1, Internal,

and Remote 2 Temperature offset registers. Note that PECI offset is always 1°C resolution).

[3:2]

RES

R/W

Reserved.

[4]

PECI R1

THERM

Output Only

R/W

PECI R1 = 1 enables THERM assertions when the PECI temperature read is higher than the

PECI TCONTROL limit and the THERM pin is bidirectional. If THERM is configured as an

output, the THERM timer limit register (0x7A) should be set to 0xFF to avoid unwanted alerts

from being generated.

PECI R1 = 0 indicates that the THERM pin is configured as a timer input only. Can also be

disabled by writing one of the following values to the PECI TCONTROL limit register (0x3D):

Writing −64°C in Offset 64 mode.

Writing −128°C in twos complement mode.

[5]

R1 THERM

Output Only

R/W

R1 = 1 enables THERM assertions when the Remote 1 temperature read is higher than the

Remote 1 THERM limit and the THERM pin is bidirectional. If THERM is configured as an

output, the THERM timer limit (Register 0x7A) should be set to 0xFF to avoid unwanted

alerts from being generated.

R1 = 0 indicates that the THERM pin is configured as a timer input only. Can also be disabled

by writing one of the following values to the Remote 1 THERM Temp Limit register (0x6A):

Writing −64°C in Offset 64 mode.

Writing −128°C in twos complement mode.

[6]

Local

THERM

Output Only

R/W

R1 = 1 enables THERM assertions when the Local temperature read is higher than the Local

THERM limit and the THERM pin is bidirectional. If THERM is configured as an output, the

THERM timer limit (Register 0x7A) should be set to 0xFF to avoid unwanted alerts from

being generated.

R1 = 0 indicates that the THERM pin is configured as a timer input only. Can also be disabled

by writing one of the below values to the local THERM limit register (0x6B):

Writing −64°C in Offset 64 mode.

Writing −128°C in twos complement mode.

[7]

R2 THERM

Output Only

R/W

R1 = 1 enables THERM assertions when the Remote 2 temperature read is higher than the

Remote 2 THERM limit and the THERM pin is bidirectional. If THERM is configured as an

output, the THERM timer limit (Register 0x7A) should be set to 0xFF to avoid unwanted

alerts from being generated.

R1 = 0 indicates that the THERM pin is configured as a timer input only. C an also be

disabled by writing one of the below values to the Remote 2 THERM temperature limit

Writing −64°C in Offset 64 mode.

Writing −128°C in twos complement mode.

1. This register becomes read-only when the Configuration Register 1 (0x40) LOCK bit is set to 1. Any further attempts to write to this register

have no effect.

ADT7490ARQZ-R7 Datasheet(PDF) 67 Page - ON Semiconductor

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