ADT7490ARQZ-R7 datasheet(18/75 Pages) ONSEMI

18 / 75 page

ADT7490

http://onsemi.com

Table 8. PECI Error Indicators

PECI

Data

Description

Action

0x8000 to

0x8003

PECI data error

Bit 1 of Register

0x43 is set to 1

Invalid

FCS

PECI communications error

Bit 2 of Register

0x43 is set to 1

Each PECI channel also has an associated status bit to

indicate if the PECI high or low limits have been exceeded.

An alert is generated on the SMBALERT pin when these

status bits are asserted.

Table 9. PECI Status Bits

Channel

Bit

PECI0

0x43

PECI1

0x81

PECI2

0x81

PECI3

0x81

Temperature Data REPLACE Mode

The REPLACE mode is configured by setting Bit 4 of

1 registers are replaced by PECI0 data. This is a legacy mode

that allows the thermal data from CPU1 to be stored in the

same registers as in the ADT7476A. This reduces the

software changes in systems transitioning from CPUs with

thermal diodes to CPUs with a PECI interface. However,

note that even though the associated registers are swapped,

the correct data format (PECI vs. absolute temperature, see

Table 2) must be written to and interpreted from these

registers.

Notes

In Table 10, registers listed under the Remote 1 Default

column are in absolute temperature format by default and

are in PECI format in REPLACE mode. Registers listed

under the PECI0 Default column are in PECI format by

default and in absolute temperature format in REPLACE

mode.

Table 10. Replace Mode Temperature Registers

Remote 1

Default

PECI0 Default

Value Register

Reg. 0x25

Reg. 0x33

Low Limit

Reg. 0x4E

Reg. 0x34

High Limit

Reg. 0x4F

Reg. 0x35

TMIN

Reg. 0x67

Reg. 0x3B

TRANGE

Reg. 0x5F,

Bits [7:4]

Reg. 0x3C,

Bits [7:4]

Enhanced Acoustics

Reg. 0x62,

Bits [2:0]

Reg. 0x3C,

Bits [2:0]

Enhanced Acoustics

Enable

Reg. 0x62, Bit 3

Reg. 0x3C, Bit 3

THERM

TCONTROL

Reg. 0x6A

Reg. 0x3D

TMIN Hysteresis

Reg. 0x6D,

Bits [7:4]

Reg. 0x6D,

Bits [3:0]

(Note 1)

Reg. 0x6E,

Bits [3:0]

Reg. 0x6E,

Bits [7:4]

(Note 1)

Temperature offset

Reg. 0x70

Reg. 0x94

Operating Point for

Dynamic TMIN

Reg. 0x8B

Reg. 0x8A

1. In REPLACE mode, the Remote 2 and local temperature hys-

teresis values are swapped.

In REPLACE mode, the temperature zone controlling the

relevant PWM output are also swapped from Remote 1 to

PECI0. The swap of control only occurs if the default

behavior setting for Register 0x5C Bits [7:5], Register 0x5D

Bits [7:5] or Register 0x5E Bits [7:5] is 000.

Local Temperature Measurement

The ADT7490 contains an on−chip band gap temperature

sensor whose output is digitized by the on−chip 10−bit ADC.

The 8−bit MSB temperature data is stored in the local

temperature register (Address 0x26). Because both positive

and negative temperatures can be measured, the temperature

data is stored in Offset 64 format or twos complement

format, as shown in Table 11 and Table 12. Theoretically, the

temperature sensor and ADC can measure temperatures

from −128

°C to +127°C (or −64°C to +191°C in the

extended temperature range) with a resolution of 0.25

°C.

However, this exceeds the operating temperature range of

the device, so local temperature measurements outside the

ADT7490 operating temperature range are not possible.

ADT7490ARQZ-R7 Datasheet(PDF) 18 Page - ON Semiconductor

ADT7490ARQZ-R7 Datasheet(HTML) 18 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

Datasheet Download

Link URL