ADT7490ARQZ-R7 datasheet(25/75 Pages) ONSEMI

25 / 75 page

ADT7490

http://onsemi.com

If THERM is enabled (Bit 1, Configuration Register 3

at Address 0x78),

• Pin 22 becomes THERM.

• If Pin 14 is configured as THERM (Bit 0 and Bit 1 of

Configuration Register 4 at Address 0x7D), THERM is

enabled on this pin.

If THERM is not enabled,

• Pin 22 becomes a 2.5 VIN measurement input.

• If Pin 14 is configured as THERM, THERM is disabled

on this pin.

Table 18. Configuring Pin 14 in Register 0x7D

Bit 1

Bit 0

Function

TACH4

THERM

SMBALERT

Reserved

THERM as an Input

When THERM is configured as an input, the user can time

assertions on the THERM pin. This can be useful for

connecting to the PROCHOT output of a CPU to gauge

system performance.

The user can also set up the ADT7490 so that the fans run

at 100% when the THERM pin is driven low externally. The

fans run at 100% for the duration of the time that the THERM

pin is pulled low. This is done by setting the BOOST bit

(Bit 2) in Configuration Register 3 (Address 0x78) to 1. This

works only if the fan is already running, for example, in

manual mode when the current duty cycle is above 0x00, or

in automatic mode when the temperature is above TMIN.

If the temperature is below TMIN or if the duty cycle in

manual mode is set to 0x00, pulling the THERM low

externally has no effect. See Figure 32 for more information.

Figure 32. Asserting THERM Low as an Input in

Automatic Fan Speed Control Mode

THERM

TMIN

THERM ASSERTED TO LOW AS AN INPUT:

FANS DO NOT GO TO 100%, BECAUSE

TEMPERATURE IS BELOW TMIN.

THERM ASSERTED TO LOW AS AN INPUT:

FANS DO NOT GO TO 100%, BECAUSE

TEMPERATURE IS ABOVE TMIN

THERM Timer

The ADT7490 has an internal timer to measure THERM

assertion time. For example, the THERM input can be

connected to the PROCHOT output of a CPU to measure

system performance. The THERM input can also

be connected to the output of a trip point temperature sensor.

The timer is started on the assertion of the ADT7490

THERM input and stopped when THERM is deasserted.

The timer counts THERM times cumulatively, that is, the

timer resumes counting on the next THERM assertion. The

THERM timer continues to accumulate THERM assertion

times until the timer is read (it is cleared on read), or until it

reaches full scale. If the counter reaches full scale, it stops

at that reading until cleared.

The 8−bit THERM timer status register (0x79) is designed

so that Bit 0 is set to 1 on the first THERM assertion. Once

the cumulative THERM assertion time has exceeded

45.52 ms, Bit 1 of the THERM timer is set and Bit 0 now

becomes the LSB of the timer with a resolution of 22.76 ms

(see Figure 33).

Figure 33. Understanding the THERM Timer

THERM

TIMER

(REG. 0x79)

THERM ASSERTED

≤ 22.76ms

7 6 53 2 10

000

0001

THERM

TIMER

(REG. 0x79)

THERM ASSERTED

≥ 45.52ms

7 6 53 2 10

000

0010

THERM

TIMER

(REG. 0x79)

THERM ASSERTED ≥ 113.8ms

(91.04ms + 22.76ms)

7 6 53 2 10

000

0101

THERM

ACCUMULATE THERM LOW

ASSERTION TIMES

THERM

ACCUMULATE THERM LOW

ASSERTION TIMES

When using the THERM timer, be aware of the following:

After a THERM timer read (Register 0x79):

• The contents of the timer are cleared on read.

• Bit 5 of Interrupt Status 2 register (0x42) needs to be

cleared (assuming that the THERM timer limit has

been exceeded).

ADT7490ARQZ-R7 Datasheet(PDF) 25 Page - ON Semiconductor

ADT7490ARQZ-R7 Datasheet(HTML) 25 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

Datasheet Download

Link URL