ADT7490ARQZ-R7 datasheet(27/75 Pages) ONSEMI

27 / 75 page

ADT7490

http://onsemi.com

Figure 34. Functional Block Diagram of THERM Monitoring Circuitry

22.76ms

45.52ms

91.04ms

182.08ms

364.16ms

728.32ms

1.457s

2.914s

OUT

RESET

LATCH

CLEARED

ON READ

FAN4 BIT (BIT 5)

INTERRUPT MASK REGISTER 2

(REGISTER 0x75)

1 = MASK

FAN4 BIT (BIT 5)

INTERRUPT STATUS 2

COMPARATOR

22.76ms

45.52ms

91.04ms

182.08ms

364.16ms

728.32ms

1.457s

2.914s

7 6 543 2 1 0

THERM TIMER LIMIT

(REGISTER 0x7A)

THERM TIMER STATUS

(REGISTER 0x79)

THERM TIMER CLEARED ON READ

SMBALERT

THERM

Alternatively, OS− or BIOS−level software can

time−stamp when the system is powered on. If an

SMBALERT is generated due to the THERM timer limit

being exceeded, another time−stamp can be taken. The

difference in time can be calculated for a fixed THERM timer

limit time. For example, if it takes one week for a THERM

timer limit of 2.914 sec to be exceeded, and the next time it

takes only 1 hour, this is an indication of a serious degradation

in system performance.

Configuring the THERM Pin as an Output

In addition to monitoring THERM as an input, the

ADT7490 can optionally drive THERM low as an output.

When PROCHOT is bidirectional, THERM can be used to

throttle the processor by asserting PROCHOT. The user can

preprogram system−critical thermal limits. If the

temperature exceeds a thermal limit by 0.25

°C, THERM

asserts low. If the temperature is still above the thermal limit

on the next monitoring cycle, THERM stays low. THERM

remains asserted low until the temperature is equal to or

below the thermal limit. Because the temperature for that

channel is measured only once for every monitoring cycle,

after THERM asserts, it is guaranteed to remain low for at

least one monitoring cycle.

The THERM pin can be configured to assert low if the

Remote 1 THERM, local THERM, Remote 2 THERM or

PECI temperature limits are exceeded by 0.25

°C. The

THERM temperature limit registers are at Register 0x6A,

[5:7] of Configuration Register 5 (0x7C) enables the

THERM output feature for the Remote 1, local, and

Remote 2 temperature channels, respectively. Figure 35

shows how the THERM pin asserts low as an output in the

event of a critical overtemperature.

Figure 35. Asserting THERM as an Output, Based on

Tripping THERM Limits

MONITORING

CYCLE

TEMP

THERM LIMIT

0.255C

THERM LIMIT

THERM

An alternative method of disabling THERM is to program

the THERM temperature limit to –63

°C or less in Offset 64

mode, or −128

°C or less in twos complement mode; that is,

for THERM temperature limit values less than –63

°C or

–128

°C, respectively, THERM is disabled.

Enabling and Disabling THERM on Individual

Channels.

The THERM pin can be enabled/disabled for individual

or combinations of temperature channels using Bits [7:5] of

Configuration Register 5 (0x7C).

ADT7490ARQZ-R7 Datasheet(PDF) 27 Page - ON Semiconductor

ADT7490ARQZ-R7 Datasheet(HTML) 27 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

Datasheet Download

Link URL