ADT7490ARQZ-R7 datasheet(32/75 Pages) ONSEMI

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ADT7490

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PWM Logic State

The PWM outputs can be programmed high for 100%

duty cycle (non−inverted) or low for 100% duty cycle

(inverted).

PWM1 Configuration (Register 0x5C)

Bit 4 (INV)

0 = Logic high for 100% PWM duty cycle (non−inverted)

1 = Logic low for 100% PWM duty cycle (inverted)

PWM2 Configuration (Register 0x5D)

Bit 4 (INV)

0 = Logic high for 100% PWM duty cycle

1 = Logic low for 100% PWM duty cycle

PWM3 Configuration (Register 0x5E)

Bit 4 (INV)

0 = Logic high for 100% PWM duty cycle (non−inverted)

1 = Logic low for 100% PWM duty cycle (inverted).

Low Frequency Mode PWM Drive Frequency

The PWM drive frequency can be adjusted for the

application. Register 0x5F to Register 0x61 configure the

PWM frequency for PWM1 to PWM3, respectively.

PWM1, PWM 2, PWM3 Frequency Registers

(Register 0x5F to Register 0x61)

Bits [2:0] FREQ

000 = 11.0 Hz

001 = 14.7 Hz

010 = 22.1 Hz

011 = 29.4 Hz

100 = 35.3 Hz default

101 = 44.1 Hz

110 = 58.8 Hz

111 = 88.2 Hz

High Frequency Mode PWM Drive

Setting Bit 3 of Register 0x5F, Register 0x60, and Register

0x61 enables high frequency mode for Fan 1, Fan 2, and

Fan 3, respectively.

In high frequency mode, the PWM drive frequency is

always 22.5 kHz. When high frequency mode is enabled, the

dc bits are automatically asserted internally and do not need

to be changed.

Fan Speed Control

The ADT7490 controls fan speed using automatic and

manual modes.

In automatic fan speed control mode, fan speed is

automatically varied with temperature and without CPU

intervention, once initial parameters are set up. The

advantage is that, if the system hangs, the user is guaranteed

that the system is protected from overheating.

In manual fan speed control mode, the ADT7490 allows

the duty cycle of any PWM output to be manually adjusted.

This can be useful if the user wants to change fan speed in

software or adjust PWM duty cycle output for test purposes.

Bits [7:5] of Register 0x5C to Register 0x5E (PWM

Configuration) control the behavior of each PWM output.

PWM Configuration Registers

(Register 0x5C to Register 0x5E)

Bits [7:5] (BHVR)

111 = manual mode

Once under manual control, each PWM output can be

manually updated by writing to Register 0x30 to Register

0x32 (PWMx current duty cycle registers).

Programming the PWM Current Duty Cycle Registers

The PWM current duty cycle registers are 8−bit registers

that allow the PWM duty cycle for each output to be set

anywhere from 0% to 100% in steps of 0.39%. The value to

be programmed into the PWMMIN register is given by

Value (decimal) = PWMMIN/0.39%

Example 1

For a PWM duty cycle of 50%,

Value (decimal) = 50%/0.39% = 128 (decimal)

Value = 128 (decimal) or 0x80 (hexadecimal)

Example 2

For a PWM duty cycle of 33%,

Value (decimal) = 33%/0.39% = 85 (decimal)

Value = 85 (decimal) or 0x54 (hexadecimal)

PWM Duty Cycle Registers

By reading the PWMx current duty cycle registers, the

user can keep track of the current duty cycle on each PWM

output, even when the fans are running in automatic fan

speed control mode or acoustic enhancement mode.

Programming TRANGE

TRANGE defines the distance between TMIN and 100%

PWM. For the ADT7467, ADT7468, and ADT7473,

TRANGE is effectively a slope. For the ADT7475, ADT7476,

and ADT7490, TRANGE is no longer a slope but defines the

temperature region where the PWM output linearly ramps

from PWMMIN to 100% PWM.

Figure 47. TRANGE

TMIN

PWM = 100%

PWMMIN

PWMMAX

PWM = 0%

TRANGE

ADT7490ARQZ-R7 Datasheet(PDF) 32 Page - ON Semiconductor

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