MAC7200 datasheet(216/976 Pages) FREESCALE

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Nexus Integration

MAC7200 Microcontroller Family Reference Manual, Rev. 2

138

Freescale Semiconductor

NOTE

On the MAC72xx, STOP mode is not implemented, and ext_lps[0] will

always read back as a ‘0’.

11.4.1

Nexus Integration and SoC Security

In order to prevent access to internal resources, such as the Flash, when they are secured, all debug features

(i.e.-EICE and Nexus) are disabled when the chip is in a secured mode, denoted by the negation of the

debug_enabled signal. Please refer to Chapter 9, “Device Memory Map” for more details on this. When

debug_enabled is negated, the following actions are taken:

•

The DBGEN signal to the ARM7 core is negated.

•

All clocks to the Nexus are gated off. See the section “Power Consumption” below for more

details.

11.4.2

Nexus Integration and FlexBus Port Sizing

Because the Nexus Secondary Port is muxed in with the address bus of the external bus, it is impossible

to use the FlexBus when the Nexus is active, and the Secondary Port is selected. It is only possible to use

the Nexus on the Primary Port with an 8-bit external bus.

11.4.3

Nexus Integration and Port Control

Unlike other “peripherals” in the system, which require programming of the Port Integration Module

(PIM) in order to give control of the pins to the peripheral, the Nexus will automatically be given control

of the appropriate ports once enabled (by setting of Nexus Present and Nexus Port Select hardware

configuration pins). This is done in order to avoid requiring the development system to write internal

memory-mapped registers. On the MAC71xx family, the number of MSEO pins selected was done via an

input port on the Nexus module (ext_mseo_sel) (0 = 1-pin, 1 = 2-pin). For all MAC71xx devices, this was

tied to 0, denoting a single MSEO pin was available. On the MAC72xx, this selection is done via the MSC

bit in the Port Control Register (PCR) in the Nexus (0 = 1-pin, 1 = 2-pin). On the MAC72xx, a single

MSEO pin is available. Therefore, the software must not set this bit in the PCR register.

Table 11-10. FlexBus Port Sizing with Nexus

Nexus Port Select

(PF0)

Nexus Present

(PF1)

Allowed FlexBus Port Sizes

(PF3)

0 (Primary)

1 (Yes)

8-bit (PF3=0)

0 (Primary)

0 (No)

8/16-bit (PF3=0/1)

1 (Secondary)

1 (Yes)

FlexBus not available

1 (Secondary)

0 (No)

8/16-bit (PF3=0/1)

MAC7200 Datasheet(PDF) 216 Page - Freescale Semiconductor, Inc

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