MAC7200 datasheet(572/976 Pages) FREESCALE

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Initialization/Application Information

MAC7200 Microcontroller Family Reference Manual, Rev. 2

494

Freescale Semiconductor

counter = 1) or the PINDATAxx registers (with a minor counter > 1). Note that if a pin is

configured as either Peripheral Mode or General Purpose Input mode, then writing to the

PORTDATA register will have no effect on that particular pin. In this manner, it is possible to

simultaneously write to less than 16 pins in a port, using the PORTDATA register. If, however,

you have General Purpose Output pins in the port that you do not wish to change, you must use the

PINDATAxx registers. In this case, the pins must be contiguous (i.e.-PA3,PA4,PA5,PA6 for

instance)

6. If any interrupt or error handling needs to be configured for the DMA Channel, do this by writing

the appropriate registers in the DMA

7. Write the appropriate DMASERQ register in the DMA to enable the channel

8. Enable the DMA Channel in the DMA Channel Mux (with triggering) by setting the ENBL and

TRIG bits in the appropriate CHCONFIGxx register in the DMA Channel Mux. Choose an

“Always Enabled” source (i.e.-$25 to $2C). This can be done by writing $E5...$EC to the

CHCONFIGxx register. You should only use an “Always Enabled” source for a single DMA

Channel. It is recommended to use $25 for Channel #0, $26 for Channel#1, etc.

27.7.5

Enabling and Configuring Sources

27.7.5.1

Enabling a Source with Periodic Triggering

1. Determine with which DMA channel the source will be associated. Remember that only DMA

channels 0–7 have periodic triggering capability

2. Clear the ENBL and TRIG bits of the DMA channel

3. Ensure that the DMA channel is properly configured in the DMA. The DMA channel may be

enabled at this point

4. In the PIT, configure the corresponding timer

5. Select the source to be routed to the DMA channel. Write to the corresponding CHCONFIG

Example 27-2. Configure DSPI_B Transmit for use with DMA Channel 2, with periodic triggering capability

1. Write 0x00 to CHCONFIG2 (Base Address + 0x02)

2. Configure Channel 2 in the DMA, including enabling the channel

3. Configure Timer 3 in the Periodic Interrupt Timer (PIT) for the desired trigger interval

4. Write 0xC5 to CHCONFIG2 (Base Address + 0x02)

The following code example illustrates steps #1 and #4 above:

In File registers.h:

#define DMAMUX_BASE_ADDR

0xFC084000/* Example only ! */

/* Following example assumes char is 8-bits */

volatile unsigned char *CHCONFIG0 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0000);

volatile unsigned char *CHCONFIG1 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0001);

volatile unsigned char *CHCONFIG2 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0002);

volatile unsigned char *CHCONFIG3 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0003);

volatile unsigned char *CHCONFIG4 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0004);

volatile unsigned char *CHCONFIG5 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0005);

MAC7200 Datasheet(PDF) 572 Page - Freescale Semiconductor, Inc

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