MAC7200 datasheet(571/976 Pages) FREESCALE

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Initialization/Application Information

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

493

— Configure error and interrupt handling for DMA Channel #0 by writing the appropriate

registers in the DMA

— Write $00 to the DMASERQ register in the DMA to enable Channel #0

2. Connect the channel from step#1 to the desired peripheral by writing the CHCONFIGxx register

in the DMA Channel Mux

— Write $87 to CHCONFIG0 to setup Channel #0 with ESCI_A Transmit

3. Enable the desired peripheral by clearing its MDIS bit

— Turn on the module by writing the MDIS bit to 0

4. Setup the DMA interface of the peripheral by writing the appropriate register(s) in the peripheral.

Please refer to the section for the particular peripheral for more information.

— Select a baud rate. Write this value to the ESCI baud registers (SCIBDH/L) to begin the baud

rate generator. Remember that the baud rate generator is disabled when the baud rate is zero.

Writing to the SCIBDH has no effect without also writing to SCIBDL

—Write to SCICR1 to configure word length, parity, and other configuration bits

(LOOPS,RSRC,M,WAKE,ILT,PE,PT)

— Enable the transmitter, interrupts, receive, and wake up as required, by writing to the SCICR2

the ESCI is used with a DMA. A preamble or idle character will now be shifted out of the

transmitter shift register

27.7.4

Using the “Always Enabled” Feature to Periodically Drive GPIO Pins

1. Temporarily disable the desired DMA Channel in the DMA Channel Mux by writing $00 to the

corresponding CHCONFIGxx register

2. Set up the correct timer interval by writing the correct value into the TLVAL register in the PIT

The timer reload value for step PIT2) can be calculated with the following formula:

Eqn. 27-1

For example: The system clock is 66.67Mhz (TSYSCLOCK = 15ns), which gives us a bus clock of

33.33Mhz (TBUSCLOCK = 30ns). The desired trigger period is 30μs.

Eqn. 27-2

NOTE

All PIT timers, except the RTI, run off of the Bus Clock, which is 1/2 the

frequency of the System Clock.

3. Enable the PIT trigger by setting the corresponding bit in the PITEN register in the PIT

4. Configure the desired pin(s) to be General Purpose Outputs by writing $40 to the corresponding

CONFIGxx register(s) in the PIM

5. Configure the Transfer Control Descriptor (TCD) for the given DMA Channel by writing to the

TCDxx registers in the DMA. The Source Address will probably be a location in the Flash or

SRAM memories, and the Destination Address will be the PORTDATA register (with a minor

trigger period

clock period

--------------------------------

–

timer reload value

μs

30ns

------------

–

999

0x0000_03E7

MAC7200 Datasheet(PDF) 571 Page - Freescale Semiconductor, Inc

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