MAC7200 datasheet(568/976 Pages) FREESCALE

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DMA_CH_MUX Bus Aborts

MAC7200 Microcontroller Family Reference Manual, Rev. 2

490

Freescale Semiconductor

executions of the minor loop require a new "start" event be sent. This can either be a new software

activation, or a transfer request from the DMA Channel Mux. The options for doing this are:

•

Transfer all data in a single minor loop. By configuring the DMA to transfer all of the data in a

single minor loop (i.e.-major loop counter = 1), no re-activation of the channel is necessary. The

disadvantage to this option is the reduced granularity in determining the load that the DMA transfer

will incur on the system. For this option, the DMA channel should be disabled in the DMA Channel

Mux.

•

Use explicit software re-activation. In this option, the DMA is configured to transfer the data using

both minor and major loops, but the processor is required to re-activate the channel (by writing to

the DMA registers) after every minor loop. For this option, the DMA channel should be disabled

in the DMA Channel Mux.

•

Use a "always enabled" DMA source. In this option, the DMA is configured to transfer the data

using both minor and major loops, and the DMA Channel Mux does the channel re-activation. For

this option, the DMA channel should be enabled and pointing to an "always enabled" source. Note

that the re-activation of the channel can be continuous (DMA triggering is disabled) or can use the

DMA triggering capability. In this manner, it is possible to execute periodic transfers of packets of

data from one source to another, without processor intervention.

27.5

DMA_CH_MUX Bus Aborts

The DMA_CH_MUX module supports Peripheral Bus bus aborts, and enforces the following memory

map:

Supervisor Access: Unused

27.6

DMA_CH_MUX Differences from MAC71xx

•

Fixed MUCts01645 (Write on bus abort still writes register)

•

Re-allocated peripherals

— DSPI_C located at $23/$24

— "Always Enabled" moves from $23-$2A to $25-$2C

Table 27-6. DMA Channel Mux Bus Aborts

Abort

Allowed

$0000-$000f

$0010-$3fff

Table 27-7. MAC71xx versus MAC72xx DMA Channel Mux Assignment

Value

MAC71x1

MAC72x2

MAC72x1

$00

Disabled

$01

IIC Transmit

$02

IIC Receive

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