MAC7200 datasheet(570/976 Pages) FREESCALE

570 / 976 page

Initialization/Application Information

MAC7200 Microcontroller Family Reference Manual, Rev. 2

492

Freescale Semiconductor

27.7

Initialization/Application Information

27.7.1

Reset

The reset state of each individual bit is shown within the Register Description section (See Section 27.3.1,

“Register Descriptions”). In summary, after reset, all channels are disabled and must be explicitly enabled

before use.

27.7.2

Enabling the DMA_CH_MUX

It is not necessary to enable the DMA_CH_MUX before it can be used. However, it must be configured

before any DMA transfers can occur, as all DMA Channel Mux channels are disabled by default.

27.7.3

Simple Setup from AG

1. Set up the desired channel in the DMA

2. Connect the channel from step#1 to the desired peripheral by writing the CHCONFIGxx register

in the DMA Channel Mux

3. Enable the desired peripheral by clearing its MDIS bit

4. Set up the DMA interface of the peripheral by writing the appropriate register(s) in the peripheral.

Please refer to the section for the particular peripheral for more information.

Example 27-1. Configure DMA Channel #0 to be used with ESCI_A (transmit)

1. Set up the desired channel in the DMA

— Configure TCD00 in the DMA to transfer from the ESCI_A’s SCIDRH/L registers to memory

(probably SRAM or Flash)

$24

Always Enabled

DSPI_C Receive

$25

Always Enabled

$26

Always Enabled

$27

Always Enabled

$28

Always Enabled

$29

Always Enabled

$2A

Always Enabled

$2B

Disabled

Always Enabled

$2C

Disabled

Always Enabled

$2D - $FF

Disabled

Table 27-7. MAC71xx versus MAC72xx DMA Channel Mux Assignment (Continued)

Value

MAC71x1

MAC72x2

MAC72x1

MAC7200 Datasheet(PDF) 570 Page - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 570 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL