MAC7200 datasheet(578/976 Pages) FREESCALE

578 / 976 page

FlexCAN2 Implementation on the MAC7200

MAC7200 Microcontroller Family Reference Manual, Rev. 2

500

Freescale Semiconductor

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Maskable interrupts.

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Programmable I/O modes.

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External transceiver assumed.

28.1.3

CAN Protocol

28.1.3.1

Terminology

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Dominant — Typically logic level ‘0’

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Recessive — Typically logic level ‘1’

28.1.3.2

Data Frame

A Data Frame carries data from a transmitter to the receivers. Length varies from 45 to 109 bits, depending

on the number of bytes in the data payload (including minimum interframe space).

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INTERFRAME SPACE - Minimum of 1 recessive bit [1 bit]

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START OF FRAME - 1 dominant bit [1 bit]

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ARBITRATION FIELD - [12 bits]

— IDENITIFIER - The Message ID [11 bits]

— RTR-bit - 1 dominant bit [1 bit]

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CONTROL FIELD - [6 bits]

— RESERVED - Reserved for future use [2 bits]

— DATA LENGTH CODE - Specifies the number of data bytes in the payload [4 bits]

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DATA FIELD - The data payload, ranging from 0 to 8 bytes [0 to 64 bits]

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CRC FIELD - [16 bits (?)]

— CRC SEQUENCE - The frame check sequence [15 bits (?)]

— CRC DELIMITER - 1 recessive bit [1 bit]

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ACK FIELD - [2 bits]

— ACK SLOT - Acknowledge reception of the CRC sequence with 1 dominant bit [1 bit]

— ACK DELIMITER - 1 recessive bit [1 bit]

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END OF FRAME - [7 bits]

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