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MAC7200 Datasheet(PDF) 581 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 581 Page - Freescale Semiconductor, Inc |
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581 / 976 page ![]() FlexCAN2 Implementation on the MAC7200 MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 503 28.1.3.5 Overload Frame An Overload Frame is used to provide for an extra delay between the preceding and the succeeding DATA or REMOTE FRAMEs. The length varies from 14 to 20 bits. • OVERLOAD FLAG - The superposition of all OVERLOAD FLAG fields from all stations [6 to 12 bits] • OVERLOAD DELIMITER - 8 recessive bits [8 bits] 28.1.4 CAN Implementation The FlexCAN module has several different configuration options. On the MAC72xx device, the FlexCAN modules have the following configuration: • Number of Message Buffers (Mail Boxes): 32 per FlexCAN • MDIS Reset Value: The reset value of the MDIS bit is 1, meaning that the FlexCAN is in a disabled state after reset, and must be explicitly enabled before it can be used. • Rx Masking: Receive masking is not available on the MAC72xx FlexCANs. • Reception Queue: Reception queues are not available on the MAC72xx FlexCANs. • Wakeup: Because there is no STOP mode on the MAC72xx, the wakeup from bus activity feature of the FlexCAN is only valid in DOZE mode. In this case, the FlexCAN can be left running, and any FlexCAN interrupt can be used to wake the system. 28.1.5 CAN External Pins 28.1.6 FlexCAN Bus Aborts The FlexCAN module supports Peripheral Bus bus aborts, and enforces the following memory map: Table 28-1. CAN External Pins Signal Description RxD_n This input pin provides the serial receive side of the FlexCAN bus. TxD_n This output pin provides the serial transmit side of the FlexCAN bus. |
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