MAC7200 datasheet(970/976 Pages) FREESCALE

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Flash Characteristics

MAC7200 Microcontroller Family Reference Manual, Rev. 2

892

Freescale Semiconductor

A.18.1

NVM Timing Specifications

The Flash Main Array and Shadow Block program and erase operations are timed using an internally

generated clock.

A.18.2

NVM Reliability

The reliability of the NVM blocks is guaranteed by stress test during qualification, constant process

monitors and burn-in to screen early life failures. The failure rates for data retention and program/erase

cycling are specified at the operating conditions noted. The program/erase cycle count on the sector is

incremented every time a sector or erase event is executed.

Table A-36. NVM Program/Erase Times

Symbol

Characteristic

Min

Typ1

1. Typical program and erase times assume nominal supply values and operation at 25C.

Initial

Max2

2. Initial factory condition: < 100 program/erase cycles, nominal supply values and operation at 25C.

Max3

3. The Maximum characteristic is at worst case conditions after the specified number of program erase cycles. This maximum

value is characterized but not guaranteed.

Units

tdwprogram

Double Word (64 bits) Program Time4

4. Actual hardware programming times. This does not include software overhead.

—10—

500

μs

tpprogram

Page (128 bits) Program Time5

5. Actual hardware programming times. This does not include software overhead.

—15

500

μs

t16kpperase

16KB Block Pre-program and Erase Time

—

325

525

5,000

t48kpperase

48KB Block Pre-program and Erase Time

—

435

525

5,000

t64kpperase

64KB Block Pre-program and Erase Time

—

525

675

5,000

t128kpperase

128KB Block Pre-program and Erase Time

—

675

1,800

15,000

Table A-37. NVM Module Life

Symbol

Characteristic

Min

Typical

Max

Units

Array P/E

Cycles

P/E Cycles for 16KB, 48KB and 64KB blocks, across full

operating temperature range.

(-40C <= Tj <= 150C)

100,000

—

P/E Cycles

P/E Cycles for 128KB blocks, across full operating

temperature range.

(-40C <= Tj <= 150C)

10,000

100,0001

1. Typical P/E Cycles is 100,000 cycles for 128KB blocks. For additional information on the Freescale definition of typical

endurance, please refer to Engineering Bulletin EB619 “Typical Endurance for Nonvolatile Memory”

—

P/E Cycles

Data

Retention

Data Retention for blocks with 0 – 1,000 P/E cycles.

(Maximum temperature Tj = 150C)

—

Years

Data Retention for blocks with 1,001 – 100,000 P/E cycles.

(Maximum temperature Tj = 150C)

—

Years

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