©2008 SCILLC. All rights reserved.

Publication Order Number:

May 2008 – Rev. 4

FS6131/D

FS6131

Programmable Line Lock Clock Generator IC

1.0 Key Features

• Selectable CMOS or PECL compatible outputs

• External feedback loop capability allows genlocking

• Tunable VCXO loop for jitter attenuation

2.0 General Description

The FS6131-01 is a monolithic CMOS clock generator/regenerator IC designed to minimize cost and component count in a variety of

electronic systems. Via the I

The ability to tune the on-board voltage-controlled crystal oscillator (VCXO), the length of the reference and feed-back dividers, their

granularity, and the flexibility of the post divider make the FS6131-01 the most flexible stand-alone phase-locked loop (PLL) clock

generator available.

3.0 Applications

• Frequency synthesis

• Line-locked and genlock applications

• Clock multiplication

• Telecom jitter attenuation

1

16

2

3

4

5

6

7

8

15

14

13

12

11

10

9

SCL

SDA

ADDR

VSS

XIN

XOUT

XTUNE

VDD

LOCK/IPRG

EXTLF

VSS

REF

FBK

VDD

CLKP

CLKN

16-pin 0.150" SOIC

Figure 1: Pin Configuration