FS6131 datasheet(33/44 Pages) ONSEMI

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Rev. 4 | Page 33 of 44 | www.onsemi.com

FS6131

IPRG

CLKN

CLKP

{

from

PLL

LOAD

PECL Mode Output

Figure 21: Thévenin Termination (PECL)

11.1.1. Example Calculation

In PECL mode, the output driver does not source current, so the VIH value is determined by the ratios of the terminating resistors using

the equation

NMH

where Rp1 is the pull-up resistor, Rp2 is the pull-down resistor and VNMH is the desired noise margin, and

NMH

−

The resistor ratio must also match the line impedance via the equation

where zL is the line impedance.

Combining these equations, and solving for Rp1 gives

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

NMH

If the load's VIH(min) = VCC - 0.6, choose a VNMH = 0.45V. If the line impedance is 75W, then Rp1 is about 82W. Substituting into the equation

for line impedance and solving for Rp2 gives a value of 880W (choose 910W).

To solve for the load's VIL, an output sink current must be programmed via the IPRG pin. If the desired VIH = VCC - 1.6, choose VCC - 2.0 for

some extra margin. A sink current of 25mA through the 82W resistor generates a 2.05V drop. The sink current is programmed via the

IPRG pin, where the ratio of IPRG current to output sink current is 1:4. An IPRG programming resistor of 750W at VDD = 5V generates

6.6mA, or about 27mA output sink current.

11.2 CMOS Output Mode

If a CMOS interface is desired, a transmission line is typically terminated using a series termination. Series termination adds no dc

loading to the driver, and requires less power than other resistive termination methods. In addition, no extra impedance exists from the

signal line to a reference voltage, such as ground.

FS6131 Datasheet(PDF) 33 Page - ON Semiconductor