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DS9101 Datasheet(PDF) 42 Page - Maxim Integrated Products

Part # DS9101
Description  Hygrochron Temperature/Humidity Logger
PDF  55 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS9101 Datasheet(HTML) 42 Page - Maxim Integrated Products

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Master-to-Slave
For a write-one time slot, the voltage on the data line
must have crossed the VTH threshold before the write-one
low time tW1LMAX is expired. For a write-zero time slot,
the voltage on the data line must stay below the VTH
threshold until the write-zero low time tW0LMIN is expired.
The voltage on the data line should not exceed VILMAX
during the entire tW0L or tW1L window. After the VTH
threshold has been crossed, the DS1923 needs a recov-
ery time tREC before it is ready for the next time slot.
Slave-to-Master
A read-data time slot begins like a write-one time slot.
The voltage on the data line must remain below VTL
until the read low time tRL is expired. During the tRL
window, when responding with a 0, the DS1923 starts
pulling the data line low; its internal timing generator
determines when this pulldown ends and the voltage
starts rising again. When responding with a 1, the
DS1923 does not hold the data line low at all, and the
voltage starts rising as soon as tRL is over.
The sum of tRL +
δ (rise time) on one side and the inter-
nal timing generator of the DS1923 on the other side
define the master sampling window (tMSRMIN to
tMSRMAX) in which the master must perform a read from
the data line. For most reliable communication, tRL
should be as short as permissible and the master
should read close to but no later than tMSRMAX. After
reading from the data line, the master must wait until
tSLOT is expired. This guarantees sufficient recovery
time tREC for the DS1923 to get ready for the next time
slot.
Improved Network Behavior
(Switchpoint Hysteresis)
In a 1-Wire environment, line termination is possible
only during transients controlled by the bus master (1-
Wire driver). 1-Wire networks, therefore, are susceptible
to noise of various origins. Depending on the physical
size and topology of the network, reflections from end
points and branch points can add up or cancel each
other to some extent. Such reflections are visible as
glitches or ringing on the 1-Wire communication line.
Noise coupled onto the 1-Wire line from external
sources can also result in signal glitching. A glitch dur-
ing the rising edge of a time slot can cause a slave
device to lose synchronization with the master and, as
a consequence, result in a Search ROM command
coming to a dead end or cause a device-specific func-
tion command to abort. For better performance in net-
work applications, the DS1923 uses a new 1-Wire
front-end, which makes it less sensitive to noise and
also reduces the magnitude of noise injected by the
slave device itself.
The DS1923’s 1-Wire front-end differs from traditional
slave devices in four characteristics:
1) The falling edge of the presence pulse has a con-
trolled slew rate. This provides a better match to the
line impedance than a digitally switched transistor,
converting the high-frequency ringing known from
traditional devices into a smoother, low-bandwidth
transition. The slew-rate control is specified by the
parameter tFPD, which has different values for stan-
dard and overdrive speed.
2) There is additional lowpass filtering in the circuit that
detects the falling edge at the beginning of a time
slot. This reduces the sensitivity to high-frequency
noise. This additional filtering does not apply at over-
drive speed.
3) There is a hysteresis at the low-to-high switching
threshold VTH. If a negative glitch crosses VTH but
does not go below VTH - VHY, it is not recognized
(Figure 14, Case A). The hysteresis is effective at
any 1-Wire speed.
4) There is a time window specified by the rising edge
hold-off time tREH during which glitches are ignored,
even if they extend below VTH - VHY threshold
(Figure 14, Case B, tGL < tREH). Deep voltage
droops or glitches that appear late after crossing the
VTH threshold and extend beyond the tREH window
cannot be filtered out and are taken as the begin-
ning of a new time slot (Figure 14, Case C, tGL
≥
tREH).
Devices that have the parameters tFPD, VHY, and tREH
specified in their electrical characteristics use the
improved 1-Wire front-end.
Hygrochron Temperature/Humidity Logger
iButton with 8KB Data-Log Memory
42
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