AD1843JS datasheet(57/64 Pages) AD

57 / 64 page

AD1843

REV. 0

–57–

MOUT

CMBUF

10k

1/2

OP279

OPTIONAL

TO PC

SPEAKER

470µF

Figure 26. AD1843 Mono Output Circuit

Figure 27 illustrates reference bypassing. VREF should only be

connected to its bypass capacitors. The 10

µF capacitor should

be tantalum, and the 0.1

µF capacitor should be ceramic. Figure

27 shows an optional voltage follower buffer on the CMOUT

signal. The output of this buffer, CMBUF, can be used in any

circuit which needs the common-mode bias point from the

AD1843’s on-chip voltage reference. The AD820 is a JFET in-

put op amp whose very high impedance inputs present essen-

tially no load on the CMOUT output from the AD1843.

VREF

10µF

0.1µF

CMOUT

10µF

0.1µF

CMBUF

1/2

AD820

OPTIONAL BUFFER

Figure 27. AD1843 Voltage Reference Bypassing

Figure 28 illustrates the signal-path filtering capacitors, FILTL

and FILTR, connections to analog ground. The 1.0

µF capaci-

tors required by the AD1843 can be of any type.

1.0µF

FILTL

1.0µF

FILTR

Figure 28. AD1843 External Filter Capacitor Connections

Figure 29 illustrates the antialias filtering capacitors, AAFILTL

and AAFILTR, connections to analog ground. The 1000 pF

capacitors must be NPO types.

1000pF

NPO

AAFILTL

AAFILTR

1000pF

NPO

Figure 29. AD1843 Antialias Filter Capacitor Connections

The 24.576 MHz crystal shown in the crystal connection cir-

cuitry of Figure 30 should be fundamental-mode and parallel-

tuned. Note that using the exact data sheet frequency is not

required and that external clock sources can be used in place of

the AD1843’s internal oscillator. If using an external clock

source, apply it to the crystal input pin (XTALI) while leaving

the crystal output pin (XTALO) unconnected. Attention

24.576 MHz

XTALI

XTALO

20–64pF

Figure 30. AD1843 Crystal Connections

should be paid to providing a low-jitter external input clock.

Ideally, there should be no greater than 5 ns rms of random

(white) phase jitter to ensure that it does not significantly de-

grade the SNR of the AD1843.

Figure 31 and Figure 32 show example circuits for a Data

Access Arrangement (DAA). These circuits are shown as

examples only; DAA circuits are subject to regulatory approval

since they connect directly to the Public Switched Telephone

Network (PSTN).

220

Ω

SSI 73M9001

TXA

TXA/

MONSUM

TIP

RING

OH/

RLY2/

AG0

AG1

POWER/

RXA

SPK

SPK/

TRAN1

TRAN2

RI/

REOUT1

REOUT2

VCCA

VCCD

AGND

DGND

+5VA

VCC

56k

TO AD1843

XCTL0

RING

INDICATION

TO HOST

INTERRUPT

RJ11

SINGLE

PHONE

COIL

220µF

AD1843 LINLP

AD1843 MIN

LOUT2LN

LOUT2LP

VCC

FROM AD1843

COIL

Figure 31. Silicon Systems DAA Example Circuit

Figure 32. Cermetek DAA Example Circuit

XMIT+

XMIT–

RCV

OFFHK

TIP

RING

VCC

GND

CERMETEK

CH1837

DAA

C3 100nF

C2 100nF

C1 100nF

LOUT2LP

LOUT2LN

LINLP

XCTL0

U3B

SN74HC14

U3A

SN74HC14

AD1843

C4 100nF

DVDD

EARTH

GROUND

VR1

MOV

VR3

MOV

VR2

MOV

CURRENT

LIMIT

CURRENT

LIMIT

C6, 1nF

1.5kV

C5, 1nF

1.5kV

RING (RED)

TIP (GREEN)

RJ-11 JACK

U3D

SN74HC14

U3C

SN74HC14

DVDD

100k

IRQ

TO DSP OR HOST

CPU INTERRUPT

+C7

4.7µF TANT

(OPTIONAL)

NOTES:

1. VR1,2,3. OVER VOLTAGE AND LIGHTNING PROTECTION

MOV SIDACTORS. AVAILABLE AS A SINGLE UNIT FROM

TECCOR, PART NUMBER P3203AB OR P3203AA.

2. C5,6. EMI/RFI SUPPRESSION. HIGH VOLTAGE DISK

CERAMIC CAPACITORS, 1nF 1.5kV.

3. F1,2. CURRENT LIMITING DEVICES. RAYCHEM POLY FUSE,

PART NUMBER TB600-45; LITTLE FUSE TYPE 251.250 OR

BUSSMAN TYPE MCR1/4. FOR NON UL APPLICATIONS,

A 10 OHM, 1/8W CARBON FILM RESISTOR MAY BE USED.

4. L1,2. EMI/RFI SUPPRESSION. FERRITE BEADS, FAIR-RITE

PART NUMBER 2643666611 OR 2943666661.

5. J1. FCC APPROVED RJ-11 JACK. REF FCC PUBLIC NOTICE #42269

INDUCTOR

AD1843JS Datasheet(PDF) 57 Page - Analog Devices

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