CSP1027 datasheet(30/64 Pages) AGERE

30 / 64 page

CSP1027 Voice Band Codec for

Data Sheet

Cellular Handset and Modem Applications

December 1999

Lucent Technologies Inc.

6 Signal Descriptions

Figure 27. CSP1027 Pinout by Interface

Figure 27 shows the pinout by interface for the

CSP1027. The signals can be separated into five inter-

faces as shown. These interfaces and the signals that

comprise them are described below.

6.1 Clock Interface

The clock interface consists of the clock input, crystal

oscillator, and clock outputs for the codec.

6.1.1 CLK

Clock Input: The input clock for the CSP1027 when

the XOSCEN is a logic low. Codec operation restricts

CLK to integer frequencies from 1 MHz to 40 MHz or

specific multiples of 8 kHz. When XOSCEN is tied to

logic high, the CLK input is not selected but should be

tied low or high to minimize input buffer power.

6.1.2 XLO

Crystal Input: The crystal for CSP1027 voice band

codec is connected between XLO and XHI. When the

crystal is not being used, this pin is to be left floating

and the CMOS clock applied to CLK.

6.1.3 XHI

Crystal Output: The crystal for CSP1027 handset

codec is connected between XLO and XHI. When the

crystal is not being used, this pin is to be left floating

and the CMOS clock applied to CLK.

6.1.4 XOSCEN

Crystal Oscillator Enable: When a logic high, the

crystal oscillator is selected for XLO and XHI pins.

When a logic low, the input buffer is selected for CLK

pin and the crystal oscillator is powered down.

Note: The XOSCEN pin does not have a pull-up or

pull-down device. Make sure that it is tied to VDD,

tied to VSS, or driven by valid logic levels.

CSP1027

CLK

XOSCEN

XLO

XHI

CKO1

CKO2

RSTB

PORCAP

PORB

IOCK

SYNC

SADD

SMODE0

SMODE1

SMODE2

EIGS

MICIN

AUXIN

VREG

AOUTP

AOUTN

REFC

CLOCK

INTERFACE

RESET

INTERFACE

SERIAL

INTERFACE

EXTERNAL

GAIN SELECT

INTERFACE

ANALOG

INTERFACE

5-7606 (F)

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