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FLEX10KA Datasheet(PDF) 126 Page - Altera Corporation |
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FLEX10KA Datasheet(HTML) 126 Page - Altera Corporation |
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126 / 128 page ![]() 126 Altera Corporation FLEX 10K Embedded Programmable Logic Device Family Data Sheet Multiple FLEX 10K devices can be configured in any of the five configuration schemes by connecting the configuration enable (nCE) and configuration enable output (nCEO) pins on each device. Device Pin- Outs See the Altera web site (http://www.altera.com) or the Altera Digital Library for pin-out information. Revision History The information contained in the FLEX 10K Embedded Programmable Logic Device Family Data Sheet version 4.2 supersedes information published in previous versions. Version 4.2 Changes The following change was made to version 4.2 of the FLEX 10K Embedded Programmable Logic Device Family Data Sheet: updated Figure 13. Version 4.1 Changes The following changes were made to version 4.1 of the FLEX 10K Embedded Programmable Logic Device Family Data Sheet. ■ Updated General Description section ■ Updated I/O Element section ■ Updated SameFrame Pin-Outs section ■ Updated Figure 16 ■ Updated Tables 13 and 116 ■ Added Note 9 to Table 19 ■ Added Note 10 to Table 24 ■ Added Note 10 to Table 28 Table 116. Data Sources for Configuration Configuration Scheme Data Source Configuration device EPC1, EPC2, EPC16, or EPC1441 configuration device Passive serial (PS) BitBlaster, MasterBlaster, or ByteBlasterMV download cable, or serial data source Passive parallel asynchronous (PPA) Parallel data source Passive parallel synchronous (PPS) Parallel data source JTAG BitBlaster, MasterBlaster, or ByteBlasterMV download cable, or microprocessor with Jam STAPL file or Jam Byte-Code file |
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