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UM0434 Datasheet(PDF) 132 Page - STMicroelectronics |
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UM0434 Datasheet(HTML) 132 Page - STMicroelectronics |
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132 / 390 page ![]() UM0434 Instruction model 133/391 5.13.2 Instruction index sorted by opcode Table 111 lists instructions by opcode. D 011010 ––––– ––––– – xori XOR Immediate D 011011 ––––– ––––– – xoris XOR Immediate Shifted 1. Attempted execution causes an unimplemented exception if MSR[FP]=1, or an FP Unavailable exception if MSR[FP]=0. 2. EIS-defined isel instruction, refer to Chapter 5.10.1: Integer select APU on page 112.” 3. The core CPU will take an illegal instruction exception for unsupported DCR values. 4. See Chapter 5.7: Memory synchronization and reservation instructions on page 111.” 5. See Chapter 5.10.2: Debug APU on page 112.” Table 110. Instructions sorted by mnemonic (continued) Format Opcode Mnemonic Instruction Primary (Inst0:5) Extended (Inst21:31) Legend: - Don’t care, usually part of an operand field / Reserved bit, invalid instruction form if encoded as 1 ? Allocated for implementation-dependent use. Table 111. Instructions sorted by opcode Format Opcode Mnemonic Instruction Primary (Inst0:5) Extended (Inst21:31) D 000011 ––––– ––––– – twi Trap Word Immediate D 000111 ––––– ––––– – mulli Multiply Low Immediate D 001000 ––––– ––––– – subfic Subtract From Immediate Carrying D 001010 ––––– ––––– – cmpli Compare Logical Immediate D 001011 ––––– ––––– – cmpi Compare Immediate D 001100 ––––– ––––– – addic Add Immediate Carrying D 001101 ––––– ––––– – addic. Add Immediate Carrying and record CR D 001110 ––––– ––––– – addi Add Immediate D 001111 ––––– ––––– – addis Add Immediate Shifted B 010000 ––––– ––––0 0 bc Branch Conditional B 010000 ––––– ––––0 1 bcl Branch Conditional and Link B 010000 ––––– ––––1 0 bca Branch Conditional Absolute B 010000 ––––– ––––1 1 bcla Branch Conditional and Link Absolute SC 010001 / / / / / / / / / 1 / sc System Call |
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