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AFBR-810BZ Datasheet(PDF) 35 Page - AVAGO TECHNOLOGIES LIMITED |
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AFBR-810BZ Datasheet(HTML) 35 Page - AVAGO TECHNOLOGIES LIMITED |
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35 / 48 page  35 Address Type Field Name/Description Byte Bit 233 7-4 RWn Tx Input Equalization Control Channel 1: See below for code description. Default = 7 233 3-0 RWn Tx Input Equalization Control Channel 0: See below for code description. Default = 7 234-243 all RWn Reserved: Coded 00h 244 7 RWv Mask High Tx Bias Current Alarm Channel 11: Writing 1 Prevents IntL generation, Default = 0 244 6 RWv Mask Low Tx Bias Current Alarm Channel 11: Writing 1 Prevents IntL generation, Default = 0 244 5-4 RWv Reserved 244 3 RWv Mask High Tx Bias Current Alarm Channel 10: Writing 1 Prevents IntL generation, Default = 0 244 2 RWv Mask Low Tx Bias Current Alarm Channel 10: Writing 1 Prevents IntL generation, Default = 0 244 1-0 RWv Reserved 245 7 RWv Mask High Tx Bias Current Alarm Channel 9: Writing 1 Prevents IntL generation, Default = 0 245 6 RWv Mask Low Tx Bias Current Alarm Channel 9: Writing 1 Prevents IntL generation, Default = 0 245 5-4 RWv Reserved 245 3 RWv Mask High Tx Bias Current Alarm Channel 8: Writing 1 Prevents IntL generation, Default = 0 245 2 RWv Mask Low Tx Bias Current Alarm Channel 8: Writing 1 Prevents IntL generation, Default = 0 245 1-0 RWv Reserved 246 7 RWv Mask High Tx Bias Current Alarm Channel 7: Writing 1 Prevents IntL generation, Default = 0 246 6 RWv Mask Low Tx Bias Current Alarm Channel 7: Writing 1 Prevents IntL generation, Default = 0 246 5-4 RWv Reserved 246 3 RWv Mask High Tx Bias Current Alarm Channel 6: Writing 1 Prevents IntL generation, Default = 0 246 2 RWv Mask Low Tx Bias Current Alarm Channel 6: Writing 1 Prevents IntL generation, Default = 0 246 1-0 RWv Reserved 247 7 RWv Mask High Tx Bias Current Alarm Channel 5: Writing 1 Prevents IntL generation, Default = 0 247 6 RWv Mask Low Tx Bias Current Alarm Channel 5: Writing 1 Prevents IntL generation, Default = 0 247 5-4 RWv Reserved 247 3 RWv Mask High Tx Bias Current Alarm Channel 4: Writing 1 Prevents IntL generation, Default = 0 247 2 RWv Mask Low Tx Bias Current Alarm Channel 4: Writing 1 Prevents IntL generation, Default = 0 247 1-0 RWv Reserved 248 7 RWv Mask High Tx Bias Current Alarm Channel 3: Writing 1 Prevents IntL generation, Default = 0 248 6 RWv Mask Low Tx Bias Current Alarm Channel 3: Writing 1 Prevents IntL generation, Default = 0 248 5-4 RWv Reserved 248 3 RWv Mask High Tx Bias Current Alarm Channel 2: Writing 1 Prevents IntL generation, Default = 0 248 2 RWv Mask Low Tx Bias Current Alarm Channel 2: Writing 1 Prevents IntL generation, Default = 0 248 1-0 RWv Reserved 249 7 RWv Mask High Tx Bias Current Alarm Channel 1: Writing 1 Prevents IntL generation, Default = 0 249 6 RWv Mask Low Tx Bias Current Alarm Channel 1: Writing 1 Prevents IntL generation, Default = 0 249 5-4 RWv Reserved 249 3 RWv Mask High Tx Bias Current Alarm Channel 0: Writing 1 Prevents IntL generation, Default = 0 249 2 RWv Mask Low Tx Bias Current Alarm Channel 0: Writing 1 Prevents IntL generation, Default = 0 249 1-0 RWv Reserved 250 7 RWv Mask High Tx Power Alarm Channel 11: Writing 1 Prevents IntL generation, Default = 0 250 6 RWv Mask Low Tx Power Alarm Channel 11: Writing 1 Prevents IntL generation, Default = 0 250 5-4 RWv Reserved 250 3 RWv Mask High Tx Power Alarm Channel 10: Writing 1 Prevents IntL generation, Default = 0 250 2 RWv Mask Low Tx Power Alarm Channel 10: Writing 1 Prevents IntL generation, Default = 0 250 1-0 RWv Reserved |
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