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AFBR-810BZ Datasheet(PDF) 36 Page - AVAGO TECHNOLOGIES LIMITED

Part # AFBR-810BZ
Description  Twelve-Channel Transmitter and Receiver Pluggable, Parallel-Fiber-Optic Modules
PDF  48 Pages
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Manufacturer  AVAGO [AVAGO TECHNOLOGIES LIMITED]
Direct Link  http://www.avagotech.com
Logo AVAGO - AVAGO TECHNOLOGIES LIMITED

AFBR-810BZ Datasheet(HTML) 36 Page - AVAGO TECHNOLOGIES LIMITED

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36
Address
Type
Field Name/Description
Byte
Bit
251
5-4
RWv
Reserved
251
3
RWv
Mask High Tx Power Alarm Channel 8: Writing 1 Prevents IntL generation, Default = 0
251
2
RWv
Mask Low Tx Power Alarm Channel 8: Writing 1 Prevents IntL generation, Default = 0
251
1-0
RWv
Reserved
252
7
RWv
Mask High Tx Power Alarm Channel 7: Writing 1 Prevents IntL generation, Default = 0
252
6
RWv
Mask Low Tx Power Alarm Channel 7: Writing 1 Prevents IntL generation, Default = 0
252
5-4
RWv
Reserved
252
3
RWv
Mask High Tx Power Alarm Channel 6: Writing 1 Prevents IntL generation, Default = 0
252
2
RWv
Mask Low Tx Power Alarm Channel 6: Writing 1 Prevents IntL generation, Default = 0
252
1-0
RWv
Reserved
253
7
RWv
Mask High Tx Power Alarm Channel 5: Writing 1 Prevents IntL generation, Default = 0
253
6
RWv
Mask Low Tx Power Alarm Channel 5: Writing 1 Prevents IntL generation, Default = 0
253
5-4
RWv
Reserved
253
3
RWv
Mask High Tx Power Alarm Channel 4: Writing 1 Prevents IntL generation, Default = 0
253
2
RWv
Mask Low Tx Power Alarm Channel 4: Writing 1 Prevents IntL generation, Default = 0
253
1-0
RWv
Reserved
254
7
RWv
Mask High Tx Power Alarm Channel 3: Writing 1 Prevents IntL generation, Default = 0
254
6
RWv
Mask Low Tx Power Alarm Channel 3: Writing 1 Prevents IntL generation, Default = 0
254
5-4
RWv
Reserved
254
3
RWv
Mask High Tx Power Alarm Channel 2: Writing 1 Prevents IntL generation, Default = 0
254
2
RWv
Mask Low Tx Power Alarm Channel 2: Writing 1 Prevents IntL generation, Default = 0
254
1-0
RWv
Reserved
255
7
RWv
Mask High Tx Power Alarm Channel 1: Writing 1 Prevents IntL generation, Default = 0
255
6
RWv
Mask Low Tx Power Alarm Channel 1: Writing 1 Prevents IntL generation, Default = 0
255
5-4
RWv
Reserved
255
3
RWv
Mask High Tx Power Alarm Channel 0: Writing 1 Prevents IntL generation, Default = 0
255
2
RWv
Mask Low Tx Power Alarm Channel 0: Writing 1 Prevents IntL generation, Default = 0
255
1-0
RWv
Reserved
Transmitter Input Equalization Control Code Description
Control registers 228 through 233 permit input equalization control. Four bit code blocks (either bits 7 through 4 or 3
through 0 where bit 7 or 3 is the msb) are assigned to each channel.
Codes 1xxx are reserved.
Code 0111 calls for full scale equalization and code 0000 calls for no equalization.
Intermediate code values provide intermediate levels of compensation.



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