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VP306 Datasheet(PDF) 43 Page - Mitel Networks Corporation |
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VP306 Datasheet(HTML) 43 Page - Mitel Networks Corporation |
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43 / 85 page ![]() DRAFT - PRELIMINARY DATA VP305/6 The duplication or disclosure of data contained on this sheet is subject to the restrictions on the title page of this document. 43 The sweep rate varies as a function of the value of CR_SWR register and the delta frequency, effectively selected by the CR_USWL and CR_LSWL registers. If the delta frequency is halved, the sweep rate doubles. If the receiver fails to lock, a higher value of CR_SWR should be tried. If the value of CR_SWR is too low, the frequency sweep may be stopped. The rise and fall times of the sweep can be adjusted to be equal by setting the value of CR_OFFSET, see page 37. This becomes more critical at very low values of CR_SWR where the sweep will stop unless the rise and fall times are equal. CR _ S W R 0 2 4 6 8 10 12 14 16 20 40 60 80 100 120 140 160 180 200 220 240 260 VP 305/6 carrier s weep function. Fig. 16. Carrier sweep rate for a delta frequency of ±10MHz. 2.8.2. CR_USWL U & L: Carrier Upper sweep limit registers. Parallel mode - Bank 3. Addresses 2, 3. Type Read / Write. Serial mode - Addresses 26, 27. 76543210 Reserved CR_USWL[13:8] Carrier Upper sweep limit (upper nibble) CR_USWL[7:0] Carrier Upper sweep limit (lower byte) These two bytes together form the 14 bit number: CR_USWL[13:0] Carrier Upper sweep limit. This is the division ratio (upper) for the prescaler input (PSCAL) from the SL1710. See page 12 for further discussion. |
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