VP306 datasheet(65/85 Pages) MITEL

65 / 85 page

DRAFT - PRELIMINARY DATA

VP305/6

The duplication or disclosure of data contained on this sheet is subject to the restrictions

on the title page of this document.

TIMING INFORMATION.

4.1. I²C bus timing.

LOW

t HD;STA

HD;DAT

t F

HIGH

tSU;DAT

SU;STA

SDA

SCL

t BUFF

t SU;STO

Fig. 19. I²C bus timing.

Where:

S = Start

Sr = Restart, i.e. Start without stopping first.

P = Stop.

Parameter

Symbol

Value

Unit

Min

Max.

SCL clock frequency

fSCL

450

kHz

Bus free time between a STOP and START condition.

tBUFF

200

Hold time (repeated) START condition.

tHD;STA

200

LOW period of SCL clock.

tLOW

450

HIGH period of SCL clock.

tHIGH

600

Set-up time for a repeated START condition.

tSU;STA

200

Data hold time (when input).

tHD;DAT

100

Data set-up time

tSU;DAT

100

Rise time of both SCL and SDA signals.

note 1 ns

Rise time of both SCL and SDA signals, (100pF to ground).

Set-up time for a STOP condition.

tSU;STO

200

Table 15. I²C bus timing.

Note 1.

The rise time depends on the external bus pull up resistor.

VP306 Datasheet(PDF) 65 Page - Mitel Networks Corporation

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