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TDC-GP21 Datasheet(PDF) 30 Page - ams AG

Part # TDC-GP21
Description  Ultrasonic-Flow-Converter
PDF  91 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

TDC-GP21 Datasheet(HTML) 30 Page - ams AG

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TDC-GP21
acam messelectronic gmbh - Friedrich-List-Str.4 - 76297 Stutensee - Germany - www.acam.de
3-5
START_CLKHS[1:0] Defines the time interval the chip waits after
switching on the oscillator before making a
measurement.
Note:
The highest bit to adjust START_CLKS is
located in register 6, bit 20. This has to be
set to 1 for settling times of 2.44 ms and
5.14 ms.
0 = Oscillator off
1 = Oscillator continuously on
2 = settling time 480 µs
3 = settling time 1.46 ms
4 = settling time 2.44 ms
5 to 7 = settling time 5.14 ms
ANZ_PORT
(PORT#)
Sets number of ports used for temperature
measurement
0 = 2 temperature ports (PT1 and PT2)
1 = 4 temperature ports
TCYCLE
Sets cycle time for temperature
measurement
0 = 128 µs cycle time @ 4 MHz
1 = 512 µs cycle time @ 4 MHz
(recommended)
ANZ_FAKE
(FAKE#)
Number of dummy cycles at the beginning of
a temperature measurement
0 = 2 Fake measurements
1 = 7 Fake measurements
SEL_ECLK_TMP
(SelClkT)
Select reference signal for internal cycle
clock for temperature measurement
0 = use 32.768 kHz as cycle clock
1 = use 128 * CLKHS as period for cycle
clock (32 µs with 4 MHz high speed clock
signal )
CALIBRATE
Enables/disables calibration calculation in the
ALU
0 = calculation of calibrated results off
(allowed only in measurement mode 1)
1 = calculation of calibrated results on
(recommended)
NO_CAL_AUTO
(DisAutoCal)
Enables/disables auto-calibration run in the
TDC
0 = auto-calibration after measurement
1 = auto-calibration disabled
MESSB2
(MRange2)
Switch to measurement mode 2
0 = measurement mode 1
1 = measurement mode 2
NEG_STOP2
Negation stop 2 input
0 = non-inverted input signal – rising edge
1 = inverted input signal – falling edge
NEG_STOP1
Negation stop 1 input
0 = non-inverted input signal – rising edge
1 = inverted input signal – falling edge
NEG_START
Negation start input
0 = non-inverted input signal – rising edge
1 = inverted input signal – falling edge
ID0
Free bits, e.g. to be used as identification or
version number
Member of the ams Group



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