TDC-GP21 datasheet(52/91 Pages) AMSCO

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TDC-GP21

acam messelectronic gmbh - Friedrich-List-Str.4 - 76297 Stutensee - Germany - www.acam.de

4-7

Table 4.1: ALU timings

un-calibrated

(disable Auto-

Cal.)

calibrated

Predivider

2.5 V

1.56 µs

3.0 µs

4.58 µs

7.58 µs

3.0 V

1.24 µs

2.75 µs

4.25 µs

7.26 µs

3.6 V

1.0 µs

2.54 µs

4.0 µs

7.0 µs

As soon as the data is available

from the output register the

interrupt flag is set (assumed that

the ALU interrupt is enabled, see

reg. 2, EN_INT). Further the load

pointer of the output register is

increased by 1 and points to the

next free memory. The actual

position of the load pointer can be

seen in the status register, bits 0

to 2.

Reading Data

Now the user can read the data sending

the opcode 10110ADR. With the next

16 clock cycles (un-calibrated data) or

32 clock cycles (calibrated data) the

TDC-GP21 will send the result, beginning

with the most significant bit (MSB). The

first rising edge of SCK resets the INTN

pin (interrupt).

a. Un-calibrated data format:

16 bit Signed integer in complements of

2. 1BIN = uncalibrated gate delay is

about 90 ps at 3.3 V and 25 °C.

Time = RES_X x 90 ps

b. Calibrated data format:

32 bit fixed-point number in

Example:

configuration

...

write reg1=’h014400

4 hits on channel 1,

calculate 1st Stop -Start

...

Initialize

...

while(Check interrupt flag)

write reg1=’h024400

calculate 2nd -Start

wait(4.6 µs)

write reg1=’h034400

calculate 3rd-Start

wait(4.6 µs)

write reg1=’h044400

calculate 4th-Start

wait(4.6 µs)

Now all Hit data are available from registers 0 to 3.

The load pointer value is 4.

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