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CDCE62005 Datasheet(PDF) 40 Page - Texas Instruments

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Part # CDCE62005
Description  3:5 Clock Generator
PDF  85 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCE62005 Datasheet(HTML) 40 Page - Texas Instruments

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PFD/
CP
Prescaler
/2,/3,/4,/5
Input Divider
/1 - /256
SMART _MUX
SYNTH
/1,/2,/5,/8,/10,/16,/20
/8 - /1280
Feedback Divider
1.75 GHz –
2.356 GHz
Register 6
16
17
18
19
Charge Pump Current
14
Register 5
15
16
17
18
19
20
21
Input Divider Settings
Register 6
1
2
Prescaler
3
Register 6
4
5
6
7
8
9
10
Feedback Divider
Register 6
13
14
15
Feedback Bypass Divider
0
Register 7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Loop Filter Settings
Register 6
0
VCO Select
CDCE62005
SCAS862F – NOVEMBER 2008 – REVISED JANUARY 2015
www.ti.com
8.3.5.16 Synthesizer Block
Figure 28 provides an overview of the CDCE62005 synthesizer block. The Synthesizer Block provides a Phase
Locked Loop, a partially integrated programmable loop filter, and two Voltage Controlled Oscillators (VCO). The
synthesizer block generates an output clock called “SYNTH” and drives it onto the Internal Clock Distribution
Bus.
Figure 28. CDCE62005 Synthesizer Block
8.3.5.17 Input Divider
The Input Divider divides the clock signal selected by the Smart Multiplexer (see Table 7) and presents the
divided signal to the Phase Frequency Detector / Charge Pump of the frequency synthesizer.
Table 22. CDCE62005 Input Divider Settings
INPUT DIVIDER SETTINGS
DIVIDE
SELINDIV7
SELINDIV6
SELINDIV5
SELINDIV4
SELINDIV3
SELINDIV2
SELINDIV1
SELINDIV0
RATIO
5.21
5.20
5.19
5.18
5.17
5.16
5.15
5.14
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
2
0
0
0
0
0
0
1
0
3
0
0
0
0
0
0
1
1
4
0
0
0
0
0
1
0
0
5
0
0
0
0
0
1
0
1
6
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
1
1
1
1
1
1
1
1
256
40
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Copyright © 2008–2015, Texas Instruments Incorporated
Product Folder Links: CDCE62005



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