S6J32BA datasheet(91/179 Pages) CYPRESS

91 / 179 page

Document Number: 002-05682 Rev.*A

Page 91 of 179

S6J3200 Series

8.4

AC Characteristics

8.4.1

Source Clock Timing

(Condition: See 8.2. Operation Assurance )

Parameter

Symbol

Name

Conditions

Value

Unit

Remarks

Min

Typ

Max

Source oscillation

clock frequency

X0, X1

3.6

MHz

Source oscillation

clock cycle time

tCYL

X0, X1

250.0

277.8

CAN PLL jitter

(when locked)

tPJ

-10

Internal Slow CR

oscillation frequency

FCRS

100

150

kHz

Internal Fast CR

oscillation frequency

FCRF

2.40

4.00

5.61-

MHz

Before

trim

3.20

4.00

4.81

MHz

After trim

Notes:

−

The maximum/minimum values have been standardized with the main clock and PLL clock in use.

−

The error of source oscillator frequency must be smaller than 3000ppm.

−

Enough evaluation and adjustment are recommended using oscillator on your system board.

−

X0 and X1 clock timing

tCYL

CAN PLL jitter

A time difference from the ideal clock is guaranteed for each cycle period within 20,000 cycles.

Ideal clock

Slow

Fast

PLL output

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