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PC87591L Datasheet(PDF) 281 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87591L
Description  LPC Mobile Embedded Controllers
PDF  437 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87591L Datasheet(HTML) 281 Page - National Semiconductor (TI)

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5.0 Host Controller Interface Modules (Continued)
Revision 1.07
281
www.national.com
Status Register (STATUS, Legacy 6416)
This register provides the status of the host interface keyboard channel buffers (DBBIN and DBBOUT) and the value of mes-
sages sent by the core using the Status bits to the host. The Status register can also be read by the core as HIKMST. The
Status register is cleared (0016) on reset.
Location: As defined in LDN 0616 registers, index 6216 and 6316
Type: R
Data In Buffer Register (DBBIN, Legacy 6016)
This register allows the host to write to DBBIN register while setting Status register bit IBF and clearing Status register bit
A2 bit. If the core interrupt on IBF is enabled (IBFCIE in HICTRL register is set to 1), writing to this register asserts it (high).
Location: As defined in LDN 0616 registers, index 6016 and 6116
Type: W
Command In Buffer Register (COMAND, Legacy 6416)
This register allows the host to write to DBBIN register while setting IBF and A2 bits in the Status register. If the core interrupt
on IBF is enabled (IBFCIE in HICTRL register is set to 1), writing to Data In Buffer asserts it (high).
Location: As defined in LDN 0616 registers, index 6216 and 6316
Type: W
Bit
76543210
Name
ST3-ST0
A2
F0
IBF
OBF
Reset
00000000
Bit
Description
0
OBF (Output Buffer Full). The bit is set when the keyboard/mouse channel’s DBBOUT is written to the core
(i.e., writing to HIKDO or HIMDO registers). The bit is cleared by a host processor read from the
keyboard/mouse channel output buffer (6016).
1
IBF (Input Buffer Full). The bit is set when the keyboard/mouse channel’s DBBIN is written to the host
processor (i.e., writing to either address 6016, data or address 6416, control). The bit is cleared when the core
reads the input buffer (HIKMDI).
2
F0 (Flag 0). A general-purpose flag that can be set or cleared by the core firmware.
3
A2 (A2 Address). Holds the value of the A2 signal in the last write operation of the host to the keyboard/mouse
channel’s input buffer (i.e., A2=0 for Data In Buffer write and A2=1 for Command In Buffer write).
7-4
ST3-ST0 (Status). Four general-purpose flags that can be set or cleared by the core firmware.
Bit
76543210
Name
Keyboard/Mouse DBBIN Data
Bit
Description
7-0
Keyboard/Mouse DBBIN Data.
Bit
76543210
Name
Keyboard/Mouse DBBIN Data
Bit
Description
7-0
Keyboard/Mouse DBBIN Data.



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