PC87591L datasheet(284/437 Pages) NSC

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5.0 Host Controller Interface Modules (Continued)

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Revision 1.07

Host Interface Keyboard/Mouse Status Register (HIKMST)

The HIKMST register provides the status of the Host Interface keyboard channel buffers (DBBIN and DBBOUT) and a way

for the PC87591x to send status bits to the host. This register can also be read by a host processor read operation from

address 6416. On reset, the register is cleared.

Location: 00 FEA416

Type: R/W

Host Interface Keyboard Data Out Buffer Register (HIKDO)

The HIKDO register allows the core firmware to write to DBBOUT register while setting OBF bit in the Status register. If IRQ1

interrupt is enabled, it is sent. If the core interrupt on output buffer empty is enabled (OBECIE in HICTRL register is 1), writing

to HIKDO de-asserts it (low).

Location: 00 FEA616

Type: WO

IRQNPOL (Negative Polarity). When IRQNPOL is cleared, the IRQ (IRQ1, IRQ11, IRQ12) signal polarity is

compatible with the standard ISA bus interface (as specified in the IRQM field). When hardware IRQ generation

is enabled (HICTRL register bits OBFKIE for IRQ1 and IRQ12; PMHIE for IRQ11), the interrupt output is

inverted if IRQNPOL is set.

Reserved.

Bit

76543210

Name

ST3-ST0

IBF

OBF

Reset

0000

Bit

Description

OBF (Output Buffer Full). The bit is set when the keyboard/mouse channel’s DBBOUT is written by the core

(i.e., writing to HIKDO or HIMDO register). The bit is cleared by a host processor read from the keyboard/mouse

channel output buffer (6016). This read-only bit is ignored when writing to this register.

IBF (Input Buffer Full). The bit is set when the keyboard/mouse channel’s DBBIN is written by the host

processor, i.e., writing to either address 6016 (data) or address 6416 (control). The bit is cleared by a core read

of the input buffer (HIKMDI). This read-only bit is ignored when writing to this register.

F0 (Flag 0). A general-purpose ﬂag that can be set or cleared by the core ﬁrmware.

A2 (A2 Address). Holds the value of the A2 signal in the last write operation of the host to the keyboard/mouse

channel’s input buffer (i.e., indicates A2 value during write to address 6016 or 6416). This read-only bit is ignored

when writing to this register.

7-4

ST3-ST0 (Status Bits). Four general-purpose ﬂags that can be set or cleared by the core ﬁrmware.

Bit

76543210

Name

Keyboard DBBOUT Data

Bit

Description

7-0

Keyboard DBBOUT Data.

Bit

Description

PC87591L Datasheet(PDF) 284 Page - National Semiconductor (TI)

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