PC87591L datasheet(286/437 Pages) NSC

286 / 437 page

5.0 Host Controller Interface Modules (Continued)

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5.2.2

General Description

The PM channel has two modes of operation:

●

PC87570 Compatible (available for channel 1 only) supports software previously written for the PC87570.

●

Enhanced PM includes a mechanism that facilitates easier generation of SCI and SMI interrupts to the host.

Figure 95 is a schematic diagram of the PM channel.

Data Registers

The PM channel has three registers.

●

DBBOUT - can be written to by the core and read by the host processor. Multiple addresses in the core address

space enable generating an IRQ, SMI or SCI interrupt on Output Buffer Full (OBF).

●

DBBIN - can be written to by the host processor and read by the core.

●

STATUS - can be read by both the core and the host processor. It has ﬁve bits (bits 2 and 4-7) that are written to by

the core directly or, in Enhanced PM mode, via the control and conﬁguration register. Three other bits are controlled

by hardware to indicate the status of DBBIN and DBBOUT registers.

Host Addresses

The host processor accesses the PC87591x PM channel interface registers at two addresses in the host address space.

These addresses are defined by two internal chip select signals specified in the PC87591x Host configuration registers; see

Section 6.1.13 on page 355 and Section 6.1.14 for channels 1 and 2, respectively. Legacy setting of these addresses is 6216

and 6616 for channel 1 Status/Command and Data registers, respectively.

Table 43 shows the register mapping to the host processor I/O space. For simplicity, the Host Interface module specification

refers to the legacy addresses.

DBBIN

DBBOUT

Status

D0-7

IRQ

Peripheral Bus

SIB Bus

Input Buffer

Full

Output Buffer

Empty

Interrupts to the Core

Interrupt to the Host Processor

Host-WR-Data Buffer

Host-RD-Data-Buffer

Figure 95. Host Interface PM Channel n Block Diagram

SMI SCI

Command/Status

or Data

WR-PM

RD-PM

Buffer

PC87591L Datasheet(PDF) 286 Page - National Semiconductor (TI)

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