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GC2011A Datasheet(PDF) 5 Page - Texas Instruments |
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GC2011A Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 50 page  Texas Instruments Incorporated - 1 - GC2011A 3.3V DIGITAL FILTER CHIP SLWS129A This document contains information which may be changed at any time without notice GC2011A DATASHEET 1.1 BLOCK DIAGRAM A block diagram illustrating the major functions of the chip is shown in Figure 1 Figure 1. GC2011A Block Diagram 12 bits Data In Sum In 32 bits Data Out Sum Out 12 bits 32 bits A-PATH (16 FILTER CELLS) 12 bits Data In Sum In 32 bits Data Out Sum Out 12 bits 32 bits B-PATH (16 FILTER CELLS) 12 bits BIN AOUT BOUT CASCADE MODE 2-12 ADD 24 BIT MODE GAIN 32 bits 32 bits 24 bits 16 bits 16 bits 16 bits +/-1 +/-1 12 bits AIN +/-1 +/-1 12 bits AIN 12 bits BIN 16 bits AOUT 16 bits BOUT SNAPSHOT RAM -DUAL 128 BY 16 BIT MODE -DUAL 256 BY 8 BIT MODE -SINGLE 256 BY 16 BIT MODE -SINGLE 512 BY 8 BIT MODE CONTROL INTERFACE 16 bits C 9 bits A RE WE MODE CONTROLS SNAPRAM READ COEFFICIENT READ/WRITE Feedback Out Feedback In (CASCADE MODE ONLY) CE • 128 tap interpolate by 2 or 4 • 128 taps for 1/2 rate I/O • 256 taps for 1/4 rate I/O • 200 MSPS real to 100 MSPS complex conversion mode • Real to complex or complex to real conversion modes • Snapshot memory for adaptive filter update calculations • Gain adjust in 0.5 dB steps • Microprocessor interface for control, output, and diagnostics • Built in diagnostics • 1.6 Watt at 80 MHz, 3.3 volts • 160 pin quad flat pack package • 160 pin ball grid array package 1.0 KEY FEATURES • Improved 3.3 volt, higher speed, GC2011 replacement • 106 million samples per second (MSPS) input rate • Dual inputs for complex, dual path or double rate input processing • 2’s Complement to offset binary conversion • 12 bit or 24 bit data, 14 bit coefficients • 8, 10, 12, 14, 16, 20 or 24 bit outputs • 32 bit internal precision • 32 multiply-add filter cells • Snapshot memory for adaptive filtering • 64 taps with even or odd symmetry • 128 tap decimate by 2 • 256 tap decimate by 4 |
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