Texas Instruments Incorporated

- iii -

GC2011A 3.3V DIGITAL FILTER CHIP

SLWS129A

This document contains information which may be changed at any time without notice

1.0

KEY FEATURES ......................................................................................................................... 1

1.1

BLOCK DIAGRAM ................................................................................................................................1

1.2

GC2011A TO GC2011 COMPARISON................................................................................................. 2

1.3

DATASHEET OVERVIEW ....................................................................................................................3

2.0

FUNCTIONAL DESCRIPTION ................................................................................................... 4

2.1

TRANSVERSAL FILTERS ....................................................................................................................5

2.2

CONTROL INTERFACE ....................................................................................................................... 6

2.3

COUNTER AND SYNCHRONIZATION CIRCUIT................................................................................. 7

2.4

INPUT MUX ...........................................................................................................................................8

2.5

INPUT NEGATION ................................................................................................................................8

2.6

A/B FILTER PATHS ..............................................................................................................................8

2.7

FILTER CELL ........................................................................................................................................9

2.8

ACCUMULATOR .................................................................................................................................10

2.9

24 BIT MUX CIRCUIT .........................................................................................................................10

2.10

SUMMER ............................................................................................................................................10

2.11

OUTPUT NEGATION ..........................................................................................................................11

2.12

GAIN ....................................................................................................................................................11

2.13

OUTPUT MUX .....................................................................................................................................11

2.14

SNAPSHOT MEMORY .......................................................................................................................11

3.0

FILTERING MODES ................................................................................................................. 13

3.1

FULL RATE .........................................................................................................................................14

3.2

HALF RATE .........................................................................................................................................15

3.3

QUARTER RATE ................................................................................................................................16

3.4

DOUBLE RATE I/O .............................................................................................................................16

3.5

DECIMATION ......................................................................................................................................17

3.6

INTERPOLATION ...............................................................................................................................18

3.7

HILBERT TRANSFORM FILTERS ......................................................................................................19

3.8

REAL TO COMPLEX QUADRATURE DOWN CONVERT .................................................................20

3.9

COMPLEX TO REAL QUADRATURE UPCONVERT .........................................................................21

3.10

DIAGNOSTICS ....................................................................................................................................22

4.0

PACKAGING ............................................................................................................................ 23

4.1

160 PIN QUAD FLAT PACK (QFP) PACKAGE ..................................................................................23

4.2

160 PIN BALL GRID ARRAY (PBGA) PACKAGE................................................................................25

5.0

PIN DESCRIPTIONS ................................................................................................................ 27

6.0

CONTROL REGISTERS ...........................................................................................................28

6.1

A-PATH AND B-PATH CONTROL REGISTER 0 ................................................................................29

6.2

A-PATH AND B-PATH CONTROL REGISTER 1 ................................................................................31

6.3

CASCADE MODE CONTROL REGISTER .........................................................................................32

6.4

COUNTER REGISTER .......................................................................................................................32

6.5

GAIN REGISTER ................................................................................................................................32

6.6

OUTPUT MODE REGISTER ...............................................................................................................34

6.7

SNAPSHOT MODE CONTROL REGISTERS .....................................................................................35

6.8

SNAPSHOT START CONTROL REGISTER ......................................................................................36

6.9

ONE SHOT ADDRESS .......................................................................................................................36

6.10

NEW MODES REGISTER ..................................................................................................................37

7.0

SPECIFICATIONS .................................................................................................................... 38

7.1

ABSOLUTE MAXIMUM RATINGS ......................................................................................................38

7.2

RECOMMENDED OPERATING CONDITIONS ..................................................................................38

7.3

THERMAL CHARACTERISTICS ........................................................................................................38

7.4

DC CHARACTERISTICS ....................................................................................................................39

7.5

AC CHARACTERISTICS ....................................................................................................................40

8.0

APPLICATION NOTES ............................................................................................................. 41

8.1

POWER AND GROUND CONNECTIONS ..........................................................................................41

8.2

STATIC SENSITIVE DEVICE .............................................................................................................41

8.3

100 MHZ OPERATION .......................................................................................................................41

8.4

REDUCED VOLTAGE OPERATION ...................................................................................................41

8.5

SYNCHRONIZING MULTIPLE GC2011A CHIPS ...............................................................................42