GC2011A datasheet(11/50 Pages) TI

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Texas Instruments Incorporated

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GC2011A 3.3V DIGITAL FILTER CHIP

SLWS129A

This document contains information which may be changed at any time without notice

Figure 3. Control I/O Timing

The setup, hold and pulse width requirements for control read or write operations are given in Section 7.

IMPORTANT: Care should be taken to insure that the control data is stable during the write cycle and meets

the TCSU and TCHD setup and hold requirements. If the data changes during the write cycle, then control modes may

momentarily change, adversely effecting the chip’s operation.

2.3

COUNTER AND SYNCHRONIZATION CIRCUIT

The chip contains a 20 bit control counter which is used to synchronize the filter chip’s internal controls. The

counter is synchronized to the SI sync input pulse, or can be left to free run (see the SS_OFF control bit description in

Section 6.8). The period of the counter can be set to 16*(CNT+1) clocks, where CNT ranges from 0 to 65535. The value

of CNT is set using the control register COUNTER_REG. The counter counts down from (16*CNT+15) to zero and starts

over again. Each time the counter reaches zero it generates a terminal count strobe (TC). The TC pulse can be output

on the SO pin or it can be used to trigger the snapshot memory. If the TC pulse is output on the SO pin, then it can be

used to synchronize multiple GC2011A chips. Application notes showing the use of this pin are included in Section 8.5.

The least significant 3 bits of the counter are used to synchronize the internal operation of the chip. The least

significant 12 bits of the counter can be used as diagnostic inputs to the filter paths.

The SO sync output pin can be used to output either SI delayed by 4 clock cycles, the one-shot pulse OS, or

the terminal count TC.

C[0:15]

A[0:8]

tCSU

tCDLY

tCSU

tCZ

READ CYCLE- NORMAL MODE

C[0:15]

A[0:8]

tCSU

tCSPW

tCSU

tCHD

WRITE CYCLE- NORMAL MODE

C[0:15]

A[0:8]

tCDLY

tCSU

tCZ

tCHD

C[0:15]

A[0:8]

tCSPW

tCSU

tCHD

READ CYCLE- RE HELD LOW

WRITE CYCLE- RE HELD LOW

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