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MCP19124 Datasheet(PDF) 121 Page - Microchip Technology

Part # MCP19124
Description  Digitally-Enhanced Power Analog Synchronous Low-Side Dual-Loop PWM Controller
PDF  236 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP19124 Datasheet(HTML) 121 Page - Microchip Technology

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 2016 Microchip Technology Inc.
DS20005619A-page 121
MCP19124/5
FIGURE 19-2:
ANALOG-TO-DIGITAL CONVERSION TAD CYCLES
19.1.4
INTERRUPTS
The ADC module allows for the ability to generate an
interrupt upon completion of an analog-to-digital
conversion. The ADC Interrupt Flag is the ADIF bit in
the PIR1 register. The ADC Interrupt Enable is the
ADIE bit in the PIE1 register. The ADIF bit must be
cleared in software.
This interrupt can be generated while the device is
operating or while in Sleep. If the device is in Sleep, the
interrupt will wake the device up. Upon waking from
Sleep, the next instruction following the SLEEP
instruction is always executed. If the user is attempting
to wake the device up from Sleep and resume in-line
code execution, the GIE and PEIE bits in the INTCON
register must be disabled. If the GIE and PEIE bits in
the INTCON register are enabled, execution will switch
to the Interrupt Service Routine.
19.1.5
RESULT FORMATTING
The 10-bit A/D conversion result is supplied in right
justified format only.
FIGURE 19-3:
10-BIT A/D RESULT FORMAT
TAD1 TAD2 TAD3 TAD4 TAD5 TAD6 TAD7 TAD8
TAD11
Set GO/DONE bit
Holding capacitor is disconnected from analog input (typically 100 ns)
TAD9 TAD10
TCY - TAD
ADRESH:ADRESL is loaded, GO bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
Conversion starts
b0
b9
b6
b5
b4
b3
b2
b1
b8
b7
On the following cycle:
Note 1: The ADIF bit is set at the completion of
every conversion, regardless of whether
or not the ADC interrupt is enabled.
2: The ADC operates during Sleep only
when the FRC oscillator is selected.
(ADFM = 1)
MSB
LSB
bit 7
bit 0
bit 7
bit 0
Read as ‘0’
10-bit A/D Result



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