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MCP19124 Datasheet(PDF) 140 Page - Microchip Technology |
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MCP19124 Datasheet(HTML) 140 Page - Microchip Technology |
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140 / 236 page ![]() MCP19124/5 DS20005619A-page 140 2016 Microchip Technology Inc. 22.3 Timer1 Prescaler Timer1 has four prescaler options, allowing 1, 2, 4 or 8 divisions of the clock input. The T1CKPS bits in the T1CON register control the prescale counter. The prescale counter is not directly readable or writable; however, the prescaler counter is cleared upon a write to TMR1H or TMR1L. 22.4 Timer1 Interrupt The Timer1 register pair (TMR1H:TMR1L) increments to FFFFh and rolls over to 0000h. When Timer1 rolls over, the Timer1 interrupt flag bit in the PIR1 register is set. To enable the interrupt on rollover, these bits must be set: • TMR1ON bit in the T1CON register • TMR1IE bit in the PIE1 register • PEIE bit in the INTCON register • GIE bit in the INTCON register The interrupt is cleared by clearing the TMR1IF bit in the Interrupt Service Routine. 22.5 Timer1 in Sleep Unlike other standard mid-range Timer1 modules, the MCP19124/5 Timer1 module only clocks from an internal system clock, and thus cannot run during Sleep mode, nor can it be used to wake the device from this mode. 22.6 Timer1 Control Register The Timer1 Control (T1CON) register, shown in Register 22-1, is used to control Timer1 and select the various features of the Timer1 module. Note: The TMR1H:TMR1L register pair and the TMR1IF bit should be cleared before enabling interrupts. REGISTER 22-1: T1CON: TIMER1 CONTROL REGISTER U-0 U-0 R/W-0 R/W-0 U-0 U-0 R/W-0 R/W-0 — — T1CKPS1 T1CKPS0 — — TMR1CS TMR1ON bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-6 Unimplemented: Read as ‘0’ bit 5-4 T1CKPS<1:0>: Timer1 Input Clock Prescale Select bits 11 = 1:8 Prescale value 10 = 1:4 Prescale value 01 = 1:2 Prescale value 00 = 1:1 Prescale value bit 3-2 Unimplemented: Read as ‘0’ bit 1 TMR1CS: Timer1 Clock Source Control bit 1 = 8 MHz system clock (FOSC) 0 = 2 MHz instruction clock (FOSC/4) bit 0 TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1, Clears Timer1 gate flip-flop |
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