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PM6344 Datasheet(PDF) 30 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 30 Page - PMC-Sierra, Inc |
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30 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 17 Pin Name Type Pin No. Function BRSIG[1] BRSIG[2] BRSIG[3] BRSIG[4] Output 99 100 101 102 Backplane Receive Signaling (BRSIG[4:1]). The BRSIG[4:1] signals are available on these outputs when the backplane is configured for single-rail output. Each BRSIG[x] contains the extracted signaling bits for each channel in the frame, repeated for the entire superframe. Each channel's signaling bits are valid in bit locations 5,6,7,8 of the channel and are channel- aligned with the BRPCM[x] data stream. When the ELST is not by-passed or the RCLKOSEL register bit is not set, the BRSIG[x] stream is aligned to the backplane timing and is updated on the falling edge of BRCLK. When the ELST is by-passed or the RCLKOSEL register bit is set, BRSIG[x] is aligned to the receive line timing and is updated on the falling edge of the associated RCLKO[x]. BRDN[1] BRDN[2] BRDN[3] BRDN[4] Backplane Receive Negative Line Pulse (BRDN[4:1]). The BRDN[4:1] signals are available on these outputs when the backplane is configured for dual-rail output. Each BRDN[x] NRZ output represents the RZ receive digital negative pulse signal extracted from the input bipolar signal. BRDN[x] is updated on the falling edge of the associated RCLKO[x]. |
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