PM6344 datasheet(95/256 Pages) PMC

95 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

Bit

Type

Function

Default

Bit 7

TST

Bit 6

R/W

A_TM[8]

Bit 5

R/W

A_TM[7]

Bit 4

PMCTST

Bit 3

DBCTRL

Bit 2

R/W

IOTST

Bit 1

HIZDATA

Bit 0

R/W

HIZIO

This register is used to select EQUAD test features. All bits, except for PMCTST

and A_TM[8:7] are reset to zero by a hardware reset of the EQUAD; a software

reset of the EQUAD does not affect the state of the bits in this register. Refer to

the Test Features Description section for more information.

TST:

The TST bit performs a function similar to the PMCTST bit (see below), but

does not select A_TM[8:7] internally.

A_TM[8]:

The state of the A_TM[8] bit internally replaces the input address line A[8]

when PMCTST is set. This allows for more efficient use of the PMC

manufacturing test vectors.

A_TM[7]:

The state of the A_TM[7] bit internally replaces the input address line A[7]

when PMCTST is set. This allows for more efficient use of the PMC

manufacturing test vectors.

PMCTST:

The PMCTST bit is used to configure the EQUAD for PMC's manufacturing

tests. When PMCTST is set to logic 1, the EQUAD microprocessor port

becomes the test access port used to run the PMC manufacturing test

vectors. The PMCTST bit is logically "ORed" with the IOTST bit, and is

cleared by setting CSB to logic 1.

PM6344 Datasheet(PDF) 95 Page - PMC-Sierra, Inc

PM6344 Datasheet(HTML) 95 Page - PMC-Sierra, Inc

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