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PM6344 Datasheet(PDF) 65 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 65 Page - PMC-Sierra, Inc |
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65 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 52 10 NORMAL MODE REGISTER DESCRIPTION Normal mode registers are used to configure and monitor the operation of the EQUAD. Normal mode registers (as opposed to test mode registers) are selected when A[9] is low. Notes on Normal Mode Register Bits: 1. Although the register bit descriptions for the four framers have been combined, each framer is completely independent of the others. 2. Writing values into unused register bits has no effect. Reading back unused bits can produce either a logic 1 or a logic 0; hence, unused register bits should be masked off by software when read. 3. All configuration bits that can be written into can also be read back. This allows the processor controlling the EQUAD to determine the programming state of the chip. 4. Writeable normal mode register bits are cleared to zero upon reset unless otherwise noted. 5. Writing into read-only normal mode register bit locations does not affect EQUAD operation unless otherwise noted. |
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