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PM6344 Datasheet(PDF) 90 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 90 Page - PMC-Sierra, Inc |
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90 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 77 Register 008H, 088H, 108H, 188H: Interrupt Source Bit Type Function Default Bit 7 R DJAT 0 Bit 6 R PARITY 0 Bit 5 R FRMR/SA 0 Bit 4 R PMON 0 Bit 3 R ELST 0 Bit 2 R RFDL 0 Bit 1 R XFDL 0 Bit 0 R CDRC 0 This register allows software to determine the block which produced the interrupt on the INTB output pin. The FRMR/SA bit is a logic 1 if either the FRMR or the SACI bit (register 009H, Receive TS0 Data Link Enable register) is the source of the interrupt. Reading this register does not remove the interrupt indication; the corresponding block's interrupt status register must be read to remove the interrupt indication. |
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