DM505 datasheet(161/286 Pages) TI1

161 / 286 page

DCANx_RX

DCANx_TX

SPRS91v_DCAN_01

161

DM505

www.ti.com

SPRS976A – NOVEMBER 2016 – REVISED JANUARY 2017

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Specifications

(1) H = period of baud rate, 1/programmed baud rate.

Figure 5-45. DCAN and MCAN Timings

CAUTION

The IO timings provided in this section are only valid if signals within a single

IOSET are used. The IOSETs are defined in Table 5-61.

In Table 5-61 are presented the specific groupings of signals (IOSET) for use with DCAN and MCAN.

Table 5-61. DCAN and MCAN IOSETs

SIGNALS

IOSET1

IOSET2

IOSET3

IOSET4

BALL

MUX

BALL

MUX

BALL

MUX

BALL

MUX

DCAN1

dcan1_tx

D14

F14

dcan1_rx

D15

C14

MCAN

mcan_tx

F13

F15

mcan_rx

E14

F16

5.9.6.14 GMAC_SW

The two-port gigabit ethernet switch subsystem (GMAC_SW) provides ethernet packet communication

and can be configured as an ethernet switch. It provides Reduced Gigabit Media Independent Interface

(RGMII), and the Management Data Input/Output (MDIO) for physical layer device (PHY) management.

NOTE

For more information, see the Gigabit Ethernet Switch (GMAC_SW) section of the Device

TRM.

NOTE

The Gigabit, Reduced and Media Independent Interface n (n = 0 to 1) are also referred to as

RGMIIn

5.9.6.14.1 GMAC MDIO Interface Timings

Table 5-62, Table 5-63 and Figure 5-46 present timing requirements for MDIO.

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