LPC18S50 datasheet(36/151 Pages) NXP

36 / 151 page

LPC18S50_S30_S10

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 23 February 2015

36 of 151

NXP Semiconductors

LPC18S50/S30/S10

32-bit ARM Cortex-M3 microcontroller

P9_6

L11

[2]

N; PU I/O

GPIO4[11] — General purpose digital input/output pin.

MCOB1 — Motor control PWM channel 1, output B.

USB1_PWR_FAULT — USB1 Port power fault signal

indicating over-current condition; this signal monitors

over-current on the USB1 bus (external circuitry required to

detect over-current condition).

R — Function reserved.

ENET_COL — Ethernet Collision detect (MII interface).

R — Function reserved.

U0_RXD — Receiver input for USART0.

PA_0

L12

L10

[2]

N; PU -

R — Function reserved.

I2S1_RX_MCLK — I2S1 receive master clock.

CGU_OUT1 — CGU spare clock output 1.

R — Function reserved.

PA_1

J14

H12

[3]

N; PU I/O

GPIO4[8] — General purpose digital input/output pin.

QEI_IDX — Quadrature Encoder Interface INDEX input.

R — Function reserved.

U2_TXD — Transmitter output for USART2.

R — Function reserved.

PA_2

K15

J13

[3]

N; PU I/O

GPIO4[9] — General purpose digital input/output pin.

QEI_PHB — Quadrature Encoder Interface PHB input.

R — Function reserved.

U2_RXD — Receiver input for USART2.

R — Function reserved.

Table 3.

Pin description …continued

LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.

Symbol

Description

LPC18S50 Datasheet(PDF) 36 Page - NXP Semiconductors

LPC18S50 Datasheet(HTML) 36 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL