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LPC18S50 Datasheet(PDF) 57 Page - NXP Semiconductors |
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LPC18S50 Datasheet(HTML) 57 Page - NXP Semiconductors |
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57 / 151 page ![]() LPC18S50_S30_S10 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1 — 23 February 2015 57 of 151 NXP Semiconductors LPC18S50/S30/S10 32-bit ARM Cortex-M3 microcontroller WAKEUP0 A9 A9 A4 130 [11] I; IA I External wake-up input; can raise an interrupt and can cause wake-up from any of the low-power modes. A pulse with a duration of at least 45 ns wakes up the part. This pin does not have an external pull-up. WAKEUP1 A10 C8 - - [11] I; IA I External wake-up input; can raise an interrupt and can cause wake-up from any of the low-power modes. A pulse with a duration of at least 45 ns wakes up the part. This pin does not have an external pull-up. WAKEUP2 C9 E5 - - [11] I; IA I External wake-up input; can raise an interrupt and can cause wake-up from any of the low-power modes. A pulse with a duration of at least 45 ns wakes up the part. This pin does not have an external pull-up. WAKEUP3 D8 - - - [11] I; IA I External wake-up input; can raise an interrupt and can cause wake-up from any of the low-power modes. A pulse with a duration of at least 45 ns wakes up the part. This pin does not have an external pull-up. ADC pins ADC0_0/ ADC1_0/DAC E3 B6 A2 6 [8] AI/O; IA I ADC input channel 0. Shared between 10-bit ADC0/1 and DAC. ADC0_1/ ADC1_1 C3 C4 A1 2 [8] AI; IA I ADC input channel 1. Shared between 10-bit ADC0/1. ADC0_2/ ADC1_2 A4 B3 B3 143 [8] AI; IA I ADC input channel 2. Shared between 10-bit ADC0/1. ADC0_3/ ADC1_3 B5 B4 A3 139 [8] AI; IA I ADC input channel 3. Shared between 10-bit ADC0/1. ADC0_4/ ADC1_4 C6 A5 - 138 [8] AI; IA I ADC input channel 4. Shared between 10-bit ADC0/1. ADC0_5/ ADC1_5 B3 C3 - 144 [8] AI; IA I ADC input channel 5. Shared between 10-bit ADC0/1. ADC0_6/ ADC1_6 A5 A4 - 142 [8] AI; IA I ADC input channel 6. Shared between 10-bit ADC0/1. ADC0_7/ ADC1_7 C5 B5 - 136 [8] AI; IA I ADC input channel 7. Shared between 10-bit ADC0/1. RTC RTC_ALARM A11 A10 C3 129 [11] - O RTC controlled output. This pin has an internal pull-up. The reset state of this pin is LOW after POR. For all other types of reset, the reset state depends on the state of the RTC alarm interrupt. RTCX1 A8 A8 A5 125 [8] - I Input to the RTC 32 kHz ultra-low power oscillator circuit. RTCX2 B8 B7 B5 126 [8] - O Output from the RTC 32 kHz ultra-low power oscillator circuit. Crystal oscillator pins XTAL1 D1 C1 B1 12 [8] - I Input to the oscillator circuit and internal clock generator circuits. XTAL2 E1 D1 C1 13 [8] - O Output from the oscillator amplifier. Table 3. Pin description …continued LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2. Symbol Description |
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