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LPC18S50 Datasheet(PDF) 71 Page - NXP Semiconductors |
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LPC18S50 Datasheet(HTML) 71 Page - NXP Semiconductors |
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71 / 151 page ![]() LPC18S50_S30_S10 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1 — 23 February 2015 71 of 151 NXP Semiconductors LPC18S50/S30/S10 32-bit ARM Cortex-M3 microcontroller 7.13.6.1 Features • Dynamic memory interface support including single data rate SDRAM. SDRAM maximum frequency of up to 120 MHz. • Asynchronous static memory device support including RAM, ROM, and NOR flash, with or without asynchronous page mode. • Low transaction latency. • Read and write buffers to reduce latency and to improve performance. • 8/16/32 data and 24 address lines-wide static memory support. On parts LPC1820/10 only 8/16 data lines are available. • 16-bit and 32-bit wide chip select SDRAM memory support. • Static memory features include: – Asynchronous page mode read – Programmable Wait States – Bus turnaround delay – Output enable and write enable delays – Extended wait • Four chip selects for synchronous memory and four chip selects for static memory devices. • Power-saving modes dynamically control EMC_CKEOUT and EMC_CLK signals to SDRAMs. • Dynamic memory self-refresh mode controlled by software. • Controller supports 2048 (A0 to A10), 4096 (A0 to A11), and 8192 (A0 to A12) row address synchronous memory parts. Those are typically 512 MB, 256 MB, and 128 MB parts, with 4, 8, 16, or 32 data bits per device. • Separate reset domains allow auto-refresh through a chip reset if desired. • SDRAM clock can run at full or half the Cortex-M4 core frequency. Note: Synchronous static memory devices (synchronous burst mode) are not supported. 7.13.7 High-speed USB Host/Device/OTG interface (USB0) Remark: USB0 is available on parts LPC1850/30/20 (see Table 2). The USB OTG module allows the part to connect directly to a USB host such as a PC (in device mode) or to a USB device in host mode. 7.13.7.1 Features • On-chip UTMI+ compliant high-speed transceiver (PHY). • Complies with Universal Serial Bus specification 2.0. • Complies with USB On-The-Go supplement. • Complies with Enhanced Host Controller Interface Specification. • Supports auto USB 2.0 mode discovery. • Supports all high-speed USB-compliant peripherals. • Supports all full-speed USB-compliant peripherals. |
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