LPC18S50 datasheet(86/151 Pages) NXP

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LPC18S50_S30_S10

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Product data sheet

Rev. 1 — 23 February 2015

86 of 151

NXP Semiconductors

LPC18S50/S30/S10

32-bit ARM Cortex-M3 microcontroller

10. Static characteristics

Table 10.

Static characteristics

Tamb = 40 C to +85 C unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

Supply pins

VDD(IO)

input/output supply

voltage

2.2

3.6

VDD(REG)(3V3)

regulator supply voltage

(3.3 V)

[2]

2.2

3.6

VDDA(3V3)

analog supply voltage

(3.3 V)

on pin VDDA

2.2

3.6

on pins

USB0_VDDA3V3_

DRIVER and

USB0_VDDA3V3

3.0

3.3

3.6

VBAT

battery supply voltage

[2]

2.2

3.6

Vprog(pf)

polyfuse programming

voltage

on pin VPP (for OTP)

[3] 2.7

3.6

Iprog(pf)

polyfuse programming

current

on pin VPP; OTP

programming time



1.6 ms

--30

IDD(REG)(3V3)

regulator supply current

(3.3 V)

Active mode; code

while(1){}

executed from RAM; all

peripherals disabled;

PLL1 enabled

CCLK = 12 MHz

[4] -6.6

-mA

CCLK = 60 MHz

[4]

25.3

CCLK = 120 MHz

[4] -48.4

-mA

CCLK = 180 MHz

[4] -72.0

-mA

IDD(REG)(3V3)

regulator supply current

(3.3 V)

after WFE/WFI instruction

executed from RAM; all

peripherals disabled

sleep mode

[4][5] -5.0

-mA

deep-sleep mode

[4] -30

A

power-down mode

[4] -15

A

deep power-down

mode

[4][6] -0.03

A

deep power-down

mode; VBAT floating

[4] -2

A

IBAT

battery supply current

active mode; VBAT = 3.2 V;

VDD(REG)(3V3) = 3.6 V.

[7] -0

-nA

IBAT

battery supply current

VDD(REG)(3V3) = 3.3 V;

VBAT = 3.6 V

deep-sleep mode

[9]

-2

A

power-down mode

[9] -2

A

deep power-down

mode

[9]

-2

A

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