LPC18S50 datasheet(98/151 Pages) NXP

98 / 151 page

LPC18S50_S30_S10

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 23 February 2015

98 of 151

NXP Semiconductors

LPC18S50/S30/S10

32-bit ARM Cortex-M3 microcontroller

ETHERNET

CLK_M3_ETHERNET

1.05

2.09

UART0

CLK_M3_UART0,

CLK_APB0_UART0

0.3

0.38

UART1

CLK_M3_UART1,

CLK_APB0_UART1

0.27

0.48

UART2

CLK_M3_UART2,

CLK_APB2_UART2

0.27

0.47

UART3

CLK_M3_USART3,

CLK_APB2_UART3

0.29

0.49

TIMER0

CLK_M3_TIMER0

0.07

0.14

TIMER1

CLK_M3_TIMER1

0.07

0.14

TIMER2

CLK_M3_TIMER2

0.07

0.15

TIMER3

CLK_M3_TIMER3

0.06

0.11

SDIO

CLK_M3_SDIO,

CLK_SDIO

0.79

1.37

SCTimer/PWM

CLK_M3_SCT

0.52

1.05

SSP0

CLK_M3_SSP0,

CLK_APB0_SSP0

0.12

0.21

SSP1

CLK_M3_SSP1,

CLK_APB2_SSP1

0.15

0.28

DMA

CLK_M3_DMA

1.88

3.71

WWDT

CLK_M3_WWDT

0.05

0.08

QEI

CLK_M3_QEI

0.33

0.68

USB0

CLK_M3_USB0,

CLK_USB0

1.46

3.32

USB1

CLK_M3_USB1,

CLK_USB1

2.83

5.03

RITIMER

CLK_M3_RITIMER

0.04

0.08

EMC

CLK_M3_EMC,

CLK_M3_EMC_DIV

3.6

6.97

SCU

CLK_M3_SCU

0.09

0.23

CREG

CLK_M3_CREG

0.37

0.72

Table 11.

Peripheral power consumption

Peripheral

Branch clock

IDD(REG)(3V3) in mA

Branch clock

frequency = 48 MHz

Branch clock

frequency = 96 MHz

LPC18S50 Datasheet(PDF) 98 Page - NXP Semiconductors

LPC18S50 Datasheet(HTML) 98 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL